MC9S12P32CFT Datasheet, PDF (95/566 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

2.3.54 Port J Polarity Select Register (PPSJ)
Port Integration Module (S12PPIMV1)
Address 0x026D
R
W
Reset
7
PPSJ7
0
1. Read: Anytime
Write: Anytime
6
5
4
3
2
0
0
0
PPSJ6
PPSJ2
0
0
0
0
0
Figure 2-52. Port J Polarity Select Register (PPSJ)
Access: User read/write⁽¹⁾
1
0
PPSJ1
PPSJ0
0
0
Table 2-48. PPSJ Register Field Descriptions
Field
Description
7-6, 2-0
PPSJ
Port J pull device select—Configure pull device and pin interrupt edge polarity on input pin
This bit selects a pull-up or a pull-down device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
1 A pull-down device is selected; rising edge selected
0 A pull-up device is selected; falling edge selected
2.3.55 Port J Interrupt Enable Register (PIEJ)
Read: Anytime.
Address 0x026E
R
W
Reset
7
PIEJ7
0
1. Read: Anytime
Write: Anytime
6
5
4
3
2
0
0
0
PIEJ6
PIEJ2
0
0
0
0
0
Figure 2-53. Port J Interrupt Enable Register (PIEJ)
Access: User read/write⁽¹⁾
1
0
PIEJ1
PIEJ0
0
0
Table 2-49. PIEJ Register Field Descriptions
Field
Description
7-6, 2-0 Port J interrupt enable—
PIEJ This bit enables or disables on the edge sensitive pin interrupt on the associated pin.
1 Interrupt is enabled
0 Interrupt is disabled (interrupt flag masked)
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
95