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MC9S12P32CFT Datasheet, PDF (282/566 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers | |||
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Freescaleâs Scalable Controller Area Network (S12MSCANV3)
Module Base + 0x00X2
7
6
5
4
3
2
1
0
R
W
Reset:
x
x
x
x
x
x
x
x
= Unused; always read âxâ
Figure 8-32. Identiï¬er Register 2 â Standard Mapping
Module Base + 0x00X3
7
6
5
4
3
2
1
0
R
W
Reset:
x
x
x
x
x
x
x
x
= Unused; always read âxâ
Figure 8-33. Identiï¬er Register 3 â Standard Mapping
8.3.3.2 Data Segment Registers (DSR0-7)
The eight data segment registers, each with bits DB[7:0], contain the data to be transmitted or received.
The number of bytes to be transmitted or received is determined by the data length code in the
corresponding DLR register.
Module Base + 0x00X4 to Module Base + 0x00XB
7
R
DB7
W
6
DB6
5
DB5
4
DB4
3
DB3
2
DB2
1
DB1
0
DB0
Reset:
x
x
x
x
x
x
x
x
Figure 8-34. Data Segment Registers (DSR0âDSR7) â Extended Identiï¬er Mapping
Field
7-0
DB[7:0]
Table 8-33. DSR0âDSR7 Register Field Descriptions
Description
Data bits 7-0
S12P-Family Reference Manual, Rev. 1.13
282
Freescale Semiconductor
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