English
Language : 

MC33937 Datasheet, PDF (9/48 Pages) Freescale Semiconductor, Inc – Three Phase Field Effect Transistor Pre-driver
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions 8.0 V  VPWR = VSUP  40 V-40 C  TA  135 C, unless otherwise noted. Typical
values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
CHARGE PUMP
Charge Pump
High Side Switch On Resistance
Low Side Switch On Resistance
Regulation Threshold Difference(15), (17)
Charge Pump Output Voltage(16), (17)
IOUT = 40 mA, 6.0 V < VSYS < 8.0 V
IOUT = 40 mA, VSYS > = 8.0 V
RDS(on)_HS
–
6.0
10

RDS(on)_LS
–
5.0
9.4

VTHREG
250
500
900
mV
VCP
V
8.5
9.5
–
12
–
–
GATE DRIVE
High Side Driver On Resistance (Sourcing)
VPWR = VSUP = 16 V, -40 C  TA  25 C
VPWR = VSUP = 16 V, 25 C TA  135 C
RDS(ON)_H_SRC
–
–

–
6.0
–
8.5
High Side Driver On Resistance (Sinking)
VPWR = VSUP = 16 V
High Side Current Injection Allowed Without Malfunction(17), (18)
Low Side Driver On Resistance (Sourcing)
VPWR = VSUP = 16 V, -40 C  TA  25 C
VPWR = VSUP = 16 V, 25 C TA  135 C
RDS(ON)_H_SINK
–
IHS_INJ
–
RDS(ON)_L_SRC
–
–

–
3.0
–
0.5
A

–
6.0
–
8.5
Low Side Driver On-Resistance (Sinking)
VPWR = VSUP = 16 V
Low Side Current Injection Allowed Without Malfunction(17), (18)
Gate Source Voltage, VPWR = VSUP = 40 V
High Side, IGATE = 0(19)
Low Side, IGATE = 0
Reverse High Side Gate Holding Voltage(20)
Gate Output Holding Current = 2.0 µA
Gate Output Holding Current = 5.0 µA, VSUP<26 V
Gate Output Holding Current = 5.0 µA, VSUP<40 V
RDS(ON)_L_SINK
–
ILS_INJ
–
VGS_H
13
VGS_L
13
VHS_G_HOLD
–
–
–

–
3.0
–
0.5

V
14.8
16.5
15.4
17
V
10
15
10
15
–
15
Notes
15. When VLS is this amount below the normal VLS linear regulation threshold, the charge pump is enabled.
16. VSYS is the system voltage on the input to the charge pump. Recommended external components: 1.0 µF MLC, MUR 120 diode.
17. This parameter is a design characteristic, not production tested.
18. Current injection only occurs during output switch transitions. The IC is immune to specified injected currents for a duration of
approximately 1.0 µs after an output switch transition. 1.0 µs is sufficient for all intended applications of this IC.
19. If a slightly higher gate voltage is required, larger bootstrap capacitors are required. At high duty cycles, the bootstrap voltage may not
recover completely, leading to a higher output on-resistance. This effect can be minimized by using low ESR capacitors for the bootstrap
and the VLS capacitors.
20. High Side Gate Holding voltage is the voltage between the Gate and Source of the high side FET when held in an on condition. The
trickle charge pump supplies bias and holding current for the High Side FET gate driver and output to maintain voltages after bootstrap
events. See Figure 11 for typical 100% high side gate voltage with a 5.0 µA load. This parameter is a design characteristic, not
production tested.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33937A
9