MC33937 Datasheet, PDF (39/48 Pages) Freescale Semiconductor, Inc – Three Phase Field Effect Transistor Pre-driver

FUNCTIONAL DEVICE OPERATION
INITIALIZATION REQUIREMENTS
RECOVERY FROM STANDBY MODE OR A FAULT
When the 33937A is placed in Standby Mode or a fault
condition causes a shutdown, the Gate outputs are all driven
low. The High Side gate drive is then disabled and locked to
prevent unauthorized transitions. This requires an
initialization sequence to recover normal operation at the end
of this mode of operation. The initialization sequence is
nearly identical to recovery from Sleep mode, with the
modification that the initial pulse to the Low Side Control
inputs can be reduced to a 100 ns pulse (the Low Side Gates
may not actually change state). Then the initialization is
completed by cycling the High Side Gates to re-engage the
gate drive and insure that it is in the proper state prior to
resuming normal operation.
A valid initialization sequence would go something like
this:
1. SPI command to clear all interrupt conditions
2. ENABLE1 and ENABLE2 are set HIGH (LS outputs are
now enabled)
3. PA_LS, PB_LS and PC_LS are toggled HIGH for at
least 100 ns (HS Gate Drive outputs are enabled)
longer if bootstrap capacitors need charged.
4. Toggle nPA_HS, nPB_HS and nPC_HS LOW for
DEAD TIME plus at least 100 ns.
End of initialization.
Doing step 4 simultaneously on all HS inputs will place the
motor into HIGH Side Recirculation mode and will not cause
motion during the time they are ON.
This action will restore the High Side gate drive operation
and leave it with the HS_G shorted to HS_S on all phases.
The HS output FETs will be OFF and ready for normal motor
control.
Step 3 and step 4 can be done on all the stated inputs
simultaneously. In fact it is desirable for the HS (step 4) to be
toggled simultaneously to prevent current from flowing in the
motor during initialization.
Note the inputs PA_LS, PB_LS, PC_LS, nPA_HS,
nPB_HS and nPC_HS are edge sensitive. Toggling the LS
inputs enables the HS drivers, so for the HS drivers to be
initialized correctly the edge of the input signal to the HS
drivers must come after the LS input toggle. A failure to do
this will result in the HS gate output remaining locked out from
input control. The initial LS input transition from low to high
needs to be after both ENABLE inputs are high (the device in
NORMAL mode) for the same reason. The delay between
ENABLE and the LS input should be 280 ns minimum to
insure the device is out of STBY mode.
INT
SPI
nCS
Px_Combined
nPx_HS
Px_LS
EN2
Clear
0.1µs
0.1µs
EN1
Figure 21. Recovery Initialization
The horizontal divisions are not to scale, they are a
reference to show the sequence of operation. Either
individual nPx_HS and Px_LS or nPx_Combined may be
used. nPx_Combined is defined as both nPx_HS and Px_LS
tied together or operated to the same logic level
simultaneously.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33937A
39