FXLC95000CL Datasheet, PDF (9/38 Pages) Freescale Semiconductor, Inc – Xtrinsic FXLC95000CL Intelligent, Motion-Sensing Platform

General Description
Pin #
16
17
18
19
20
21
22
23⁵
24
Default Pin
Function¹
RGPIO6
RGPIO7
SCLK1
MOSI1
MISO1
SSB1
RGPIO8
Table 1. Pin functions (continued)
Pin Function
#2
AN0-
AN1+
RGPIO10
RGPIO11
RGPIO12
RGPIO13
V_DDA
PDB_B
V_SSA
Pin Function
#3
Description
TPMCH0 RGPIO6 / ADC Input 0 / TPM Channel 0
TPMCH1 RGPIO7 / ADC Input 1 / TPM Channel 1
master queued SPI clock / RGPIO10
master queued SPI Master Output Slave Input / RGPIO11
master queued SPI Master Input Slave Output / RGPIO12
master queued SPI slave select / RGPIO13
Analog power
RGPIO8 / PDB_B
Analog ground
1. Default Pin Function 1 represents the reset state of the device. Pin functions may be changed via the SIM pin mux-
control registers. Drive strength and pullup controls are programmed by the port control registers.
2. SCL1 is available for use on pin (RGPIO14) only when SIM_PMCR1[A2] is not equal to "01". That setting would
enable it for pin 11 (RGPIO2).
3. SDA1 is available for use on pin (RGPIO15) only when SIM_PMCR1[A3] is not equal to "01". That setting would
enable it for pin 12 (RGPIO3).
4. RESETB defaults to input only, but can be configured as an open-drain, bidirectional pin.
5. GPIO8/PDB_B = LOW at startup indicates that SPI should be used as slave instead of the I²C module.
4.2.1 Pin function description
Descriptions of the pin functions available on this device are provided in this section.
Sixteen of the device pins are multiplexed with Rapid GPIO (RGPIO) functions. The
Default Pin Function column of Table 1 lists which function is active when the device
exits the reset state. User firmware can use the Pin Mux Control registers in the
System Integration Module (SIM) to change pin assignments for these pins after reset.
V_DDIO and V_SSIO
I/O power and ground. V_DDIO ranges from 1.71V to 3.6V for this device. The device
will not load the I²C bus if V_DDIO is not connected. Parasitic paths to supply this
power domain from other pins is not recommended.
V_DD and V_SS
Digital power and ground. V_DD is nominally 1.8V for this device. Parasitic paths to
supply this power domain from other pins is not recommended.
V_DDA and V_SSA
Xtrinsic FXLC95000CL Intelligent, Motion-Sensing Platform, Rev1.2, 8/2013.
9
Freescale Semiconductor, Inc.