FXLC95000CL Datasheet, PDF (15/38 Pages) Freescale Semiconductor, Inc – Xtrinsic FXLC95000CL Intelligent, Motion-Sensing Platform

General Description
1.8V
C3
0.1 µF
VDDIO
C4
1 µF
C5
0.1 µF
C6
1 µF
U1
FXLC95000
C1
1 µF
C2
0.1 µF
FB
1
1.8 V
2
R1
10 KΩ
VDDIO
V _DDIO
R6
1 KΩ
BDM
header
V_DDIO 1.8 V V_DDIO
R7
1 KΩ
Pin 1
1 _{RGPIO14 / SCL1}
RGPIO11 / MOSI1 ¹⁹
2 _{RGPIO15 / SDA1}
RGPIO10 / SCLK1 ¹⁸
3 _VSSIO
RGPIO7 / AN1+ / TPMCH1 ¹⁷
4 _VDDIO
RGPIO6 / AN0- / TPMCH0 ¹⁶
5 _VDD
RGPIO5 / PDB_A / INT_O ¹⁵
6 _{BKGD / MS / RGPIO9}
VSS ¹⁴
7 _RESETB
RGPIO10 / INT_I ¹³
C7
(Optional
EMC
filter )
Manual
reset
push button
R2
4.7 KΩ
V DDIO
R3
4.7 KΩ
I2C_CLK
I2C_DATA
INT_OUT
Notes:
VDD = 1.8V
VDDA = 1.8V
V_DDIO = 1.71V to 3.6V
Quiet V_DDA for best performance.
Pn = RGPIOn
(n from 0 to 15)
Figure 3. FXLC95000CL as a slave (I²C interface)
The basic configuration of the SPI interface is shown in Figure 4. The RGPIO pins
can also be programmed to generate interrupts to the host platform, in response to the
occurrence of application events. In this case, the pins should be routed to the external
interrupt pins of the host processor.
Xtrinsic FXLC95000CL Intelligent, Motion-Sensing Platform, Rev1.2, 8/2013.
15
Freescale Semiconductor, Inc.