FXLC95000CL Datasheet, PDF (28/38 Pages) Freescale Semiconductor, Inc – Xtrinsic FXLC95000CL Intelligent, Motion-Sensing Platform

Mechanical and Electrical Specifications
Characteristic
Warm-up time
Table 11. General timing characteristics (continued)
Symbol
Condition(s)¹
Min
Typ
T_WU
From STOP with No Clock
—
7
Frequency of operation
System clock period
Full/Slow clock ratio
Oscillator frequency absolute
accuracy @ 25°C
Oscillator frequency variation over
temperature
(–40°C to 85°C vs. ambient)
Minimum RESET Assertion
Duration
F_OPH
F_OPL
t_CYCH
t_CYCL
—
—
—
t_RA
Full-speed clock
Slow-speed clock
Full-speed clock
Slow-speed clock
—
Full-speed clock
Slow-speed clock
—
—
16
—
62.5
—
62.5
—
16
—
256
–5
—
–6
—
4T³
—
Max
Unit
—
sample
periods
—
MHz
—
KHz
—
ns
—
μs
—
+5
%
+6
%
—
—
1. All conditions at nominal supply: V_DD = V_DDA = 1.8 V and V_DDIO = 3.3 V.
2. Time measured from V_DD = V_POR until the internal reset signal is released.
3. T = Period of one system clock cycle. In full-speed mode, T is nominally 62.5 ns. In slow-speed mode, T is
nominally 16 μs.
5.11 Interfaces
The FXLC95000CL may be controlled via its included slave I²C module that can be
active 100% of the time. The FXLC95000 also includes a master I²C that should be
used only when the system clock is running at full speed. The master interface is
intended to be used to communicate with other, external sensors.
Figure 10. I²C standard and fast-mode timing
28
Freescale Semiconductor, Inc.
Xtrinsic FXLC95000CL Intelligent, Motion-Sensing Platform, Rev1.2, 8/2013.