FXLC95000CL Datasheet, PDF (31/38 Pages) Freescale Semiconductor, Inc – Xtrinsic FXLC95000CL Intelligent, Motion-Sensing Platform

Mechanical and Electrical Specifications
Table 14. Slave and master SPI timing (continued)
Drawing
Number
5
6
7
8
9
10
11
12
Function
Data set-up time (inputs)
Data hold time (inputs)
Access time
MISO Disable Time
Data valid (after SCLK edge)
Data hold time (outputs)
Rise time
Input
Output
Fall time
Input
Output
Symbol
Min
t_SU
15
t_HI
25
t_a
—
t_dis
—
t_v
—
t_HO
0
t_RI
—
t_RO
—
t_FI
—
t_FO
—
Max
—
—
25
25
25
—
25
25
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5.12 Flash parameters
The FXLC95000CL platform has 128 KB of internal flash memory. There are ROM
functions that allow the erasing and programming of the flash memory. A chip supply
voltage of 1.8 V is sufficient for the flash programming voltage.
The smallest block of memory that can be written is four bytes and those four bytes
must be aligned on a four byte boundary. The largest block of memory that can be
programmed is 256 bytes and the block must start at a 256-byte boundary.
Flash programming blocks must start on a 4-byte boundary and cannot cross a 256-
byte page boundary.
Table 15. Flash parameters
Parameter
Word depth
Row size
Page erase size (Erase block size)
Maximum page programming size
Minimum word programming size
Memory organization
Endurance
Data retention
Value
32,768
256 bytes
4 rows = 1024 bytes
1 row = 256 bytes
4 bytes
32,768 × 32 bits = 128 KB total
20,000 cycles minimum
> 100 years at room temperature
Xtrinsic FXLC95000CL Intelligent, Motion-Sensing Platform, Rev1.2, 8/2013.
31
Freescale Semiconductor, Inc.