MC9S08JM60_09 Datasheet, PDF (81/388 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 6
Parallel Input/Output
6.1 Introduction
This chapter explains software controls related to parallel input/output (I/O). The MC9S08JM60 has seven
I/O ports which include a total of 51 general-purpose I/O pins. See Chapter 2, “Pins and Connections,” for
more information about the logic and hardware aspects of these pins.
Not all pins are available on all devices. See Table 2-1 to determine which functions are available for a
specific device.
Many of the I/O pins are shared with on-chip peripheral functions, as shown in Table 2-1. The peripheral
modules have priority over the I/Os, so when a peripheral is enabled, the I/O functions are disabled.
After reset, the shared peripheral functions are disabled so that the pins are controlled by the parallel I/O.
All of the parallel I/O are configured as inputs (PTxDDn = 0). The pin control functions for each pin are
configured as follows: slew rate control enabled (PTxSEn = 1), low drive strength selected (PTxDSn = 0),
and internal pullups disabled (PTxPEn = 0).
NOTE
Not all general-purpose I/O pins are available on all packages. To avoid
extra current drain from floating input pins, the user’s reset initialization
routine in the application program must either enable on-chip pullup devices
or change the direction of unconnected pins to outputs so the pins do not
float.
6.2 Port Data and Data Direction
Reading and writing of parallel I/O is done through the port data registers. The direction, input or output,
is controlled through the port data direction registers. The parallel I/O port function for an individual pin
is illustrated in the block diagram below.
MC9S08JM60 Series Data Sheet, Rev. 3
Freescale Semiconductor
81