MC9S08JM60_09 Datasheet, PDF (29/388 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 2 Pins and Connections
SYSTEM
POWER
+
5V
V_DD
C_BLK ⁺
10 μF
C_BYAD
0.1 μF
C_BY
0.1 μF
V_{REFH MC9S08JM60}
V_DDAD
V_SSAD
V_REFL
V_DD
PORT
A
V_SS
PORT
B
NOTE 1
C1
R_F
X1
C2
R_S
BACKGROUND HEADER
XTAL
V_SSOSC
EXTAL
PORT
C
V_DD
V_DD
4.7 kΩ–10 kΩ
0.1 μF V_DD
OPTIONAL
MANUAL
RESET
ASYNCHRONOUS
INTERRUPT
INPUT
4.7 kΩ–
10 kΩ
0.1 μF
BKGD/MS
RESET
IRQ
PORT
D
PORT
E
3.3-V Reference
+
4.7 μF
0.47 μF
V_USB33
USB SERIES-B CONNECTOR
USBDN
PORT
F
PTA0–PTA5
PTB0/MISO2/ADP0
PTB1/MOSI2/ADP1
PTB2/SPSCK2/ADP2
PTB3/SS2/ADP3
PTB4/KBIP4/ADP4
PTB5/KBIP5/ADP5
PTB6/ADP6
PTB7/ADP7
PTC0/SCL
PTC1/SDA
PTC2
PTC3/TxD2
PTC4
PTC5/RxD2
PTC6
PTD0/ADP8/ACMP+ ^{I/O AND}
PTD1/ADP9/ACMP–
PTD2/KBIP2/ACMPO
PERIPHERAL
PTD3/KBIP3/ADP10 _{INTERFACE TO}
PTD4/ADP11
PTD5
APPLICATION
PTD6
PTD7
SYSTEM
PTE0/TxD1
PTE1/RxD1
PTE2/TPM1CH0
PTE3/TPM1CH1
PTE4/MISO1
PTE5/MOSI1
PTE6/SPSCK1
PTE7/SS1
PTF0/TPM1CH2
PTF1/TPM1CH3
PTF2/TPM1CH4
PTF3/TPM1CH5
PTF4/TPM2CH0
PTF5/TPM2CH1
PTF6
PTF7
21
V_Bus
V_USB33
PTG0/KBIP0
PTG1/KBIP1
34
R_PUDP
PORT
G
PTG2/KBIP6
PTG3/KBIP7
USBDP
PTG4/XTAL
PTG5/EXTAL
NOTES:
1. External crystal circuity is not required if using the MCG internal clock option. For USB operation, an external crystal is required.
2. XTAL and EXTAL are the same pins as PTG4 and PTG5, respectively.
3. RC filters on RESET and IRQ are recommended for EMC-sensitive applications.
4. R_PUDP is shown for full-speed USB only. The diagram shows a configuration where the on-chip regulator and R_PUDP are enabled.
The voltage regulator output is used for R_PUDP. R_PUDP can optionally be disabled if using an external pullup resistor on USBDP
5. V_BUS is a 5.0-V supply from upstream port that can be used for USB operation
6. USBDP and USBDN are powered by the 3.3-V regulator or external 3.3-V supply on V_USB33.
Figure 2-4. Basic System Connections
MC9S08JM60 Series Data Sheet, Rev. 3
Freescale Semiconductor
29