K50P121M100SF2 Datasheet, PDF (68/69 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Revision History
121 Pin Name
MAP
BGA
• PTD15
Default
DISABLED
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
PTD15
SPI2_PCS1
SDHC0_D7
FB_A23
ALT7
EzPort
8.2 K50 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
NOTE
The 121 MAPBGA ballmap assignments are currently being
developed.
9 Revision History
The following table provides a revision history for this document.
Table 50. Revision History
Rev. No.
2
3
4
Date
3/2011
3/2011
3/2011
Substantial Changes
Initial public revision
Added sections that were inadvertently removed in previous revision
Reworded I_IC footnote in "Voltage and Current Operating Requirements"
table.
Added paragraph to "Peripheral operating requirements and behaviors"
section.
Added "JTAG full voltage range electricals" table to the "JTAG electricals"
section.
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
68
Preliminary
Freescale Semiconductor, Inc.