K50P121M100SF2 Datasheet, PDF (64/69 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Pinout
121 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
MAP
BGA
• PGA1_DM/ PGA1_DM/ PGA1_DM/
ADC1_DM0/ ADC1_DM0/ ADC1_DM0/
ADC0_DM3 ADC0_DM3 ADC0_DM3
• VDDA
VDDA
VDDA
• VREFH
VREFH
VREFH
• VREFL
VREFL
VREFL
• VSSA
VSSA
VSSA
• ADC1_SE16/ ADC1_SE16/ ADC1_SE16/
OP1_OUT/ OP1_OUT/ OP1_OUT/
CMP2_IN2/ CMP2_IN2/ CMP2_IN2/
ADC0_SE22/ ADC0_SE22/ ADC0_SE22/
OP0_DP2/ OP0_DP2/ OP0_DP2/
OP1_DP2 OP1_DP2 OP1_DP2
• ADC0_SE16/ ADC0_SE16/ ADC0_SE16/
OP0_OUT/ OP0_OUT/ OP0_OUT/
CMP1_IN2/ CMP1_IN2/ CMP1_IN2/
ADC0_SE21/ ADC0_SE21/ ADC0_SE21/
OP0_DP1/ OP0_DP1/ OP0_DP1/
OP1_DP1 OP1_DP1 OP1_DP1
• VREF_OUT/ VREF_OUT VREF_OUT/
CMP1_IN5/
CMP1_IN5/
CMP0_IN5/
CMP0_IN5/
ADC1_SE18
ADC1_SE18
• TRI0_OUT/ TRI0_OUT/ TRI0_OUT/
OP1_DM2 OP1_DM2 OP1_DM2
• TRI0_DM TRI0_DM TRI0_DM
• TRI0_DP TRI0_DP TRI0_DP
• TRI1_DM TRI1_DM TRI1_DM
• TRI1_DP TRI1_DP TRI1_DP
• TRI1_OUT/ TRI1_OUT TRI1_OUT/
CMP2_IN5/
CMP2_IN5/
ADC1_SE22
ADC1_SE22
• DAC0_OUT/ DAC0_OUT DAC0_OUT/
CMP1_IN3/
CMP1_IN3/
ADC0_SE23/
ADC0_SE23/
OP0_DP4/
OP0_DP4/
OP1_DP4
OP1_DP4
• DAC1_OUT/ DAC1_OUT DAC1_OUT/
CMP2_IN3/
CMP2_IN3/
ADC1_SE23/
ADC1_SE23/
OP0_DP5/
OP0_DP5/
OP1_DP5
OP1_DP5
• XTAL32 XTAL32 XTAL32
• EXTAL32 EXTAL32 EXTAL32
• VBAT
VBAT
VBAT
• PTA0
JTAG_TCLK/ TSI0_CH1 PTA0
SWD_CLK/
EZP_CLK
UART0_CTS FTM0_CH5
_b
JTAG_TCLK/ EZP_CLK
SWD_CLK
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
64
Preliminary
Freescale Semiconductor, Inc.