K50P121M100SF2 Datasheet, PDF (51/69 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Peripheral operating requirements and behaviors
Table 33. TRIAMP full range operating behaviors
Symbol
I_SUPPLY
Description
Supply current (I_OUT=0mA, CL=0) — Low-power
mode
Min.
—
I_SUPPLY
Supply current (I_OUT=0mA, CL=0) — High-speed —
mode
V_OS
Input offset voltage
—
α_VOS
Input offset voltage temperature coefficient
—
I_OS
Input offset current
—
I_BIAS
Input bias current
—
R_IN
Input resistance
500
C_IN
Input capacitance
—
|X_IN|
AC input impedance (f_IN=100kHz)
—
CMRR
Input common mode rejection ratio
60
PSRR
Power supply rejection ratio
60
SR
SR
GBW
Slew rate (ΔV_IN=100mV) — Low-power mode 0.1
Slew rate (ΔV_IN=100mV) — High speed mode 1
Unity gain bandwidth — Low-power mode 50pF 0.15
GBW
Unity gain bandwidth — High speed mode 50pF 1
A_V
DC open-loop voltage gain
80
VOUT
Output voltage range
0.15
I_OUT
Output load current
—
GM
Gain margin
—
PM
Phase margin
50
Vn
Voltage noise density (noise floor) 1kHz
—
Vn
Voltage noise density (noise floor) 10kHz
—
Typ.
60
280
±3
10
±200
±300
—
17
TBD
—
—
—
—
—
—
—
—
±0.5
20
60
280
100
Max.
—
Unit
μA
—
μA
TBD
TBD
TBD
TBD
—
—
—
—
—
—
—
—
—
—
V_DD-0.15
—
—
—
—
—
mV
μV/C
pA
pA
MΩ
pF
MΩ
dB
dB
V/μs
V/μs
MHz
MHz
dB
V
mA
dB
deg
nV/√Hz
nV/√Hz
Notes
Figure 19. Typical Open Loop Gain vs. Frequency [TBD]
Figure 20. Typical Phase vs. Frequency [TBD]
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
51