MC9S12DT128CPVE Datasheet, PDF (55/128 Pages) Freescale Semiconductor, Inc – Device User Guide

Freescale Semicond_Mu_C9c_St₁o_2Dr_T,₁I₂n_8Bc_D._{evice User Guide — V01.09}
Pin Name Pin Name Pin Name Pin Name Pin Name Powered
Function 1 Function 2 Function 3 Function 4 Function 5 by
Internal Pull
Resistor
CTRL
Reset
State
Description
PE1
IRQ
—
—
—
VDDR
Always
Up
Up
Port E Input,
Maskable Interrupt
PE0
XIRQ
—
—
—
VDDR
Always
Up
Up
Port E Input, Non
Maskable Interrupt
PH7
KWH7
---
—
—
VDDR
PERH/
PPSH
Disabled Port H I/O, Interrupt
PH6
KWH6
---
—
—
VDDR
PERH/
PPSH
Disabled Port H I/O, Interrupt
PH5
KWH5
---
—
—
VDDR
PERH/
PPSH
Disabled Port H I/O, Interrupt
PH4
KWH4
---
—
—
VDDR
PERH/
PPSH
Disabled Port H I/O, Interrupt
PH3
KWH3
SS1
—
—
VDDR
PERH/
PPSH
Disabled
Port H I/O, Interrupt,
SS of SPI1
PH2
KWH2
SCK1
—
—
VDDR
PERH/
PPSH
Disabled
Port H I/O, Interrupt,
SCK of SPI1
PH1
KWH1
MOSI1
—
—
VDDR
PERH/
PPSH
Disabled
Port H I/O, Interrupt,
MOSI of SPI1
PH0
KWH0
MISO1
—
—
VDDR
PERH/
PPSH
Disabled
Port H I/O, Interrupt,
MISO of SPI1
PJ7
KWJ7
TXCAN4
SCL
—
VDDX
PERJ/
PPSJ
Port J I/O, Interrupt,
Up TX of CAN4, SCL of
IIC
PJ6
KWJ6
RXCAN4
SDA
—
VDDX
PERJ/
PPSJ
Port J I/O, Interrupt,
Up RX of CAN4, SDA of
IIC
PJ[1:0]
KWJ[1:0]
—
—
—
VDDX
PERJ/
PPSJ
Up Port J I/O, Interrupts
PK7
ECS
ROMCTL
—
—
VDDX
PUCR/
PUPKE
Up
Port K I/O,
Emulation Chip
Select, ROM Control
PK[5:0]
XADDR[19:
14]
—
—
—
VDDX
PUCR/
PUPKE
Up
Port K I/O, Extended
Addresses
PM7
BF_PSLM TXCAN4
—
—
VDDX
PERM/
PPSM
Port M I/O, BF slot
Disabled mismatch pulse, TX
of CAN4
PM6
BF_PERR RXCAN4
—
Port M I/O, BF illegal
—
VDDX
PERM/
PPSM
Disabled
pulse/message
format error pulse,
RX of CAN4
PM5
BF_PROK TXCAN0 TXCAN4
SCK0
VDDX
PERM/
PPSM
Port M I/O, BF
Disabled
reception ok pulse,
TX of CAN0, CAN4,
SCK of SPI0
PM4
BF_PSYN RXCAN0 RXCAN4
MOSI0
VDDX
PERM/
PPSM
Port M I/O, BF sync
pulse (Rx/Tx) OK
Disabled pulse o/p, RX of
CAN0, CAN4, MOSI
of SPI0
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