MC9S12D64 Datasheet, PDF (55/128 Pages) Freescale Semiconductor, Inc – Device User Guide V01.20

MC9S12DJ64 Device User Guide — V01.20
Pin Name
Function1
PJ7
PJ6
Pin Name
Function2
KWJ7
KWJ6
Pin Name Pin Name Powered
Function3 Function4 by
SCL
SDA
TXCAN0
RXCAN0
VDDX
Internal Pull
Resistor
CTRL
Reset
State
PERJ/
PPSJ
Up
Description
Port J I/O, Interrupt, SCL of IIC, TX of
CAN0
Port J I/O, Interrupt, SDA of IIC, RX of
CAN0
PJ[1:0]
KWJ[1:0]
—
—
PK7
ECS
ROMCTL
—
PK[5:0] XADDR[19:14]
—
—
PM7
—
—
—
PM6
—
—
—
PUCR/
PUPKE
Port J I/O, Interrupts
Port K I/O, Emulation Chip Select,
Up ^{ROM On Enable}
Port K I/O, Extended Addresses
Port M I/O
Port M I/O
PM5
TXCAN0
SCK
—
Port M I/O, TX of CAN0, SCK of SPI0
PM4
PM3
RXCAN0
MOSI
—
TXCAN0
SS0
—
PERM/
PPSM
Port M I/O, RX of CAN0, MOSI of SPI0
Port M I/O, TX of CAN0, SS of SPI0
PM2
RXCAN0
MISO0
—
Port M I/O, RX of CAN0, MISO of SPI0
PM1
TXCAN0
TXB
—
Port M I/O, TX of CAN0, RX of BDLC
PM0
RXCAN0
RXB
—
Port M I/O, RX of CAN0, RX of BDLC
PP7
KWP7
PWM7
—
Disabled _{Port P I/O, Interrupt, Channel 7 of}
PWM
PP6
KWP6
PWM6
—
Port P I/O, Interrupt, PWM Channel 6
PP5
KWP5
PWM5
—
PP4
KWP4
PWM4
—
VDDX _PERP/
PP3
KWP3
PWM3
—
PPSP
Port P I/O, Interrupt, PWM Channel 5
Port P I/O, Interrupt, PWM Channel 4
Port P I/O, Interrupt, PWM Channel 3
PP2
KWP2
PWM2
—
Port P I/O, Interrupt, PWM Channel 2
PP1
KWP1
PWM1
—
Port P I/O, Interrupt, PWM Channel 1
PP0
KWP0
PWM0
—
Port P I/O, Interrupt, PWM Channel 0
PS7
SS0
—
—
Port S I/O, SS of SPI0
PS6
SCK0
—
—
Port S I/O, SCK of SPI0
PS5
MOSI0
—
—
Port S I/O, MOSI of SPI0
PS4
MISO0
—
—
PS3
TXD1
—
—
PERS/
PPSS
Port S I/O, MISO of SPI0
Up
Port S I/O, TXD of SCI1
PS2
RXD1
—
—
Port S I/O, RXD of SCI1
PS1
TXD0
—
—
Port S I/O, TXD of SCI0
PS0
RXD0
—
—
Port S I/O, RXD of SCI0
PT[7:0]
IOC[7:0]
—
—
PERT/
PPST
Disabled Port T I/O, Timer channels
NOTES:
1. Refer to PEAR register description in HCS12 Multiplexed External Bus Interface (MEBI) Block Guide
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