K20P144M100SF2 Datasheet, PDF (52/67 Pages) Freescale Semiconductor, Inc – K20 Sub-Family Data Sheet

Peripheral operating requirements and behaviors
DSPI_PCSn
DSPI_SCK
(CPOL=0)
DSPI_SIN
DSPI_SOUT
DS3
DS2
DS1
DS4
DS7
DS8
First data
DS5
First data
Data
Last data
DS6
Data
Last data
y _Num
ar _DS9
DS10
in ^DS11
DS12
DS13
lim ^DS14
DS15
DS16
Figure 18. DSPI Classic SPI Timing — Master Mode
Table 37. Slave Mode DSPI Timing (Low-speed Mode)
Description
Operating voltage
Frequency of operation
DSPI_SCK input cycle time
DSPI_SCK input high/low time
DSPI_SCK to DSPI_SOUT valid
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSIP_SIN input hold
DSPI_SS active to DSPI_SOUT driven
DSPI_SS inactive to DSPI_SOUT not driven
Min.
1.71
—
8 x t_BCLK
(t_SCK/2) - 4
—
0
5
15
—
—
Max.
3.6
6.25
—
(t_SCK/2) + 4
20
—
—
—
15
15
Pre ^DSPI_SS
DS10
DS9
Unit
V
MHz
ns
ns
ns
ns
ns
ns
ns
ns
DSPI_SCK
(CPOL=0)
DS15
DS12
DS11
DS16
DSPI_SOUT
First data
Data
DS13
DS14
Last data
DSPI_SIN
First data
Data
Last data
Figure 19. DSPI Classic SPI Timing — Slave Mode
K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
52
Preliminary
Freescale Semiconductor, Inc.