908E621_08 Datasheet, PDF (50/65 Pages) Freescale Semiconductor, Inc – Integrated Quad Half-bridge and Triple High Side with Embedded MCU and LIN for High End Mirror

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
FACTORY TRIMMING AND CALIBRATION
To enhance the ease-of-use of the 908E621, various
parameters (e.g. ICG trim value) are stored in the flash
memory of the device. The following flash memory locations
are reserved for this purpose and might have a value different
from the “empty” ($FF) state:
• $FD80:$FDDF Trim and Calibration Values
• $FFFE:$FFFF Reset Vector
In the event the application uses these parameters, one
has to take care not to erase or override these values. If these
parameters are not used, these flash locations can be erased
and otherwise used.
Trim Values
Watchdog Period Range Value (AWD Trim)
The window watchdog supervises device recovery (e.g.
from code runaways).
The application software has to clear the watchdog within
the open window. Due to the high variation of the watchdog
period, and therefore the reduced width of the watchdog
window, a value is stored at address $FDCF. This value
classifies the watchdog period into 3 ranges (Range 0, 1, 2).
This allows the application software to select one of three
time intervals to clear the watchdog, based on the stored
value. The classification is done, so that the application
software can have up to ±19% variations of the optimal clear
interval (e.g. caused by ICG variation).
The usage of the trim values located in the flash memory
are explained through the following:
Internal Clock Generator (ICG) Trim Value
The internal clock generator (ICG) module is used to
create a stable clock source for the microcontroller without
using any external components. The untrimmed frequency of
the low frequency base clock (IBASE), will vary as much as
±25 percent due to process, temperature, and voltage
dependencies. To compensate these dependencies, an ICG
trim value is located at address $FDC2. After trimming, the
ICG has a typ. range of ±2% (±3% max.), at nominal
conditions (filtered (100nF), stabilized (4,7μF) V_DD = 5V,
T_Ambient~25°C), and will vary over temperature and voltage
(V_DD) as indicated in the 68HC908EY16 datasheet.
To trim the ICG, this value has to be copied to the ICG Trim
Register ICGTR at address $38 of the MCU.
Important: The value must be copied after every reset.
Table 13. Window Clear Interval
Effective Open Window
Having a variation in the watchdog period in conjunction
with a 50% open window, results in an effective open window,
which can be calculated by:
latest window open time: t_open = t_wd max / 2
earliest window closed time: t_closed = t_wd min
Optimal Clear Interval
The optimal clear interval, meaning the clear interval with
the biggest possible variation to latest window open time, and
to the earliest window closed time, can be calculated with the
following formula:
t_opt = t_open + (t_open+t_closed) / 2
See Table 13 to select the optimal clear interval for the
watchdog based on the Window No. and chosen period.
Window Range Period Select bits Watchdog Period t_wd
Effective Open Window
Optimal Clear Interval
$FDCF
WDP1:0
min.
max.
Unit t_open t_closed Unit
t_opt
Unit
max.
variation
00
68
92
46
68
57
01
34
46
23
34
28.5
0
ms
ms
ms ±19.3%
10
17
23
11.5
17
14.25
11
8.5
11.5
5.75
8.5
7.125
00
92
124
62
92
77
01
46
62
31
46
38.5
1
ms
ms
ms ±19.5%
10
23
31
15.5
23
19.25
11
11.5
15.5
7.75
11.5
9.625
00
52
68
34
52
43
01
26
34
17
26
21.5
2
ms
ms
ms ±20.9%
10
13
17
8.5
13
10.75
11
6.5
8.5
4.25
6.5
5.375
908E621
50
Analog Integrated Circuit Device Data
Freescale Semiconductor