908E621_08 Datasheet, PDF (39/65 Pages) Freescale Semiconductor, Inc – Integrated Quad Half-bridge and Triple High Side with Embedded MCU and LIN for High End Mirror

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
VSUP
On/Off
Status
PWM
High Side Driver
Charge Pump
Over-temperature Protection
Over-current Protection
Control
HBx
On/Off
Status
PWM
Low Side Driver
Current Recopy
Current Limitation
Active Clamp
Over-current Protection
GND
Figure 22. Half-bridge Push-Pull Output Driver
Half-bridge Control
Each output MOSFET can be controlled individually. The
general enable of the circuitry is done by setting PSON in the
System Control Register (SYSCTL). The HBx_L and HBx_H
bits form one half-bridge. It is not possible to switch on both
MOSFETs in one half-bridge at the same time. If both bits are
set, the high side MOSFET is in PWM mode.
To avoid both MOSFETs (high side and low side) of one
half-bridge being on at the same time, a break-before-make
circuit exists. Switching the high side MOSFET on is inhibited
as long as the potential between gate and V_SS is not below a
certain threshold. Switching the low side MOSFET on is
blocked as long as the potential between gate and source of
the high side MOSFET did not fall below a certain threshold.
HALF-BRIDGE OUTPUT REGISTER (HBOUT)
Register Name and Address: HBOUT - $01
Bit7 6
5
4
3
2
1 Bit0
Read
Write
HB4_ HB4_ HB3_ HB3_ HB2_ HB2_ HB1_ HB1_
H
L
H
L
H
L
H
L
Reset 0
0
0
0
0
0
0
0
HBx_H, HBx_L — Half-bridge Output Switches
These read/write bits select the output of each half-bridge
output according to Table 8. Reset clears all HBx_H, HBx_L
bits.
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E621
39