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908E621_08 Datasheet, PDF (1/65 Pages) Freescale Semiconductor, Inc – Integrated Quad Half-bridge and Triple High Side with Embedded MCU and LIN for High End Mirror
Freescale Semiconductor
Technical Data
Integrated Quad Half-bridge and
Triple High Side with Embedded
MCU and LIN for High End
Mirror
The 908E621 is an integrated single package solution that
includes a high performance HC08 microcontroller with a
SMARTMOSTM analog control IC. The HC08 includes flash memory,
a timer, enhanced serial communications interface (ESCI), a 10 bit
analog-to-digital converter (ADC), serial peripheral interface (SPI)
(only internal), and an internal clock generator module (ICG). The
analog control die provides four half-bridge and three high side
outputs with diagnostic functions, a Hall-effect sensor input, analog
inputs, voltage regulator, window watchdog, and local interconnect
network (LIN) physical layer.
The single package solution, together with LIN, provides optimal
application performance adjustments and space saving PCB design.
It is well suited for the control of automotive high end mirrors.
Features
• High performance M68HC908EY16 core
• 16K bytes of on-chip flash memory, 512 bytes of RAM
• Two 16-bit, 2-channel timers
• LIN physical layer interface
• Autonomous MCU watchdog / MCU supervision
• One analog input with switchable current source
• Four low RDS(ON) half-bridge outputs
• Three low RDS(ON) high side outputs
• Wake-up and 2/3-pin hall-effect sensor input
• 12 microcontroller I/Os
Document Number: MM908E621
Rev. 5.0, 6/2008
908E621
QUAD HALF-BRIDGE AND TRIPLE HIGH SIDE
SWITCH WITH EMBEDDED MCU AND LIN
DWB SUFFIX
98ASA10712D
54-PIN SOICW-EP
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
MM908E621ACDWB/R2 -40°C to 85°C 54 SOICW-EP
µC PortA
µC PortB
µC PortC
µC PortD
µC PortE
LIN
VSUP[1:8]
L0
VDDA/VREFH
HB1
EVDD
HB2
VDD
VSSA/VREFL
EVSS
VSS
RST_A
RST
IRQ_A
IRQ
PTA0/KBD0
PTA1/KBD1
PTA2/KBD2
PTA3/KBD3
PTA4/KBD4
PTB3/AD3
PTB4/AD4
PTB5/AD5
Internally connected
PTC2/MCLK
PTC3/OSC2
PTC4/OSC1
PTD0/TACH0
PTD1/TACH1
Internally connected
PTE1/RxD
GND[1:4] EP
HB3
HB4
HS1
HS2
HS3
HVDD
A0
A0CST
H0
TESTMODE
Wake Up Input
MM
4 x Half Bridge Outputs
M
High Side Output 1
High Side Output 2
High Side Output 3
Switched 5V output
Analog Input with current source
Analog Input current source trim
2-/3-pin hall sensor input
Pull to ground for user mode
Figure 1. 908E621 Simplified Application Diagram
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2007-2008. All rights reserved.