English
Language : 

MC33912_10 Datasheet, PDF (32/94 Pages) Freescale Semiconductor, Inc – LIN System Basis Chip with DC Motor Pre-driver and Current Sense
FUNCTIONAL DEVICE OPERATIONS
OPERATIONAL MODES
MC33912G5AC / MC34912G5AC
Table 7. Fault Detection Management Conditions
BLOCK
Power Supply
LIN
FAULT
MODE
BATTERY FAIL
All modes
VSUP OVER-
VOLTAGE
VSUP UNDER-
VOLTAGE
Normal, Normal
Request
VDD UNDER-
VOLTAGE
All except Sleep
VDD OVER-TEMP
PREWARNING
VDD OVER-
TEMPERATURE
All except Low
Power modes
RXD PIN SHORT
CIRCUIT
TXD PIN
PERMANENT
DOMINANT
Normal, Normal
Request
LIN DRIVER OVER-
TEMPERATURE
HIGH SIDE DRIVERS
OVER-
TEMPERATURE
CONDITION
FALLOUT
RECOVERY
VSUP<3.0 V (typ)
then power-up
-
Condition gone
VSUP > 19.25 V (typ)
In Normal mode, HS
and LS shutdown if
bit HVSE=1 (reg
MCR)
Condition gone, to
re-enable HS or LS
write to HSCR or
LSCR registers
VSUP < 6.0 V (typ)
-
MONITORING(69)
REG (FLAG,
BIT)
INTERRUPT
VSR (BATFAIL, 0)
-
VSR (VSOV,3)
IRQ low +
ISR (0101)
(70)
VSR (VSUV,2)
IRQ low + ISR
(0101)
VDD < 4.5 V (typ)
Reset (68)
Temperature >
115°C (typ)
Temperature >
170°C (typ)
RXD pin shorted to
GND or 5 V
-
VDD shutdown,
Reset then Sleep
LIN trans shutdown
TXD pin low for more
than 1s (typ)
Temperature >
160°C (typ)
LIN transmitter
shutdown
Temperature >
160°C (typ)
Both HS thermal
shutdown
Condition gone
-
VSR (VDDOT,1)
-
LIN transmitter re-
enabled once the
condition is gone and
TXD is high
LINSR,
(RXSHORT,3)
LINSR (TXDOM,2)
LINSR (LINOT,1)
Condition gone, to
re-enable HS write to
HSCR reg
All flags in HSSR
are set
-
IRQ low + ISR
(0101)
-
IRQ low + ISR
(0100)(70)
IRQ low + ISR
(0010) (70)
High Side
Low Side
Watchdog
HS1 OPEN-LOAD
DETECTION
HS2 OPEN-LOAD
DETECTION
Normal, Normal
Request
HS1 OVER-
CURRENT
HS2 OVER-
CURRENT
LOW SIDE DRIVERS
OVER-
TEMPERATURE
LS1 OPEN-LOAD
LS2 OPEN-LOAD
Normal, Normal
Request
LS1 OVER-CURRENT
LS2 OVER-CURRENT
NORMAL REQUEST
TIME-OUT EXPIRED
Normal Request
WATCHDOG
TIMEOUT
Normal
WATCHDOG ERROR Normal
Current through HSx
< 5.0 mA (typ)
-
HSSR (HS1OP,1)
HSSR (HS2OP,3)
Condition gone
-
Current through HSx
tends to rise above
the current limit
60 mA (min)
HSx on with limited
current capability
60 mA (min)
HSSR (HS1CL,0)
HSSR (HS2CL,2)
Temperature >
160°C (typ)
Both LS thermal
shutdown
Current through LSx
< 7.5mA (typ)
-
Current through LSx
tends to rise above
the current limit
160 mA (min)
LSx on with limited
current capability
160 mA (min)
The MCU did not
command the device
to Normal mode
within the 150 ms
timeout after reset
Reset
WD timeout or WD
clear within the
window closed
Reset
WDCONF pin is
floating
WD internal lower
precision timebase
150 ms (typ)
Condition gone, to
re-enable LS write to
LSCR reg
All flags in LSSR are
set
IRQ low + ISR
(0011) (70)
LSSR (LS1OP,1)
LSSR (LS2OP,3)
-
-
LSSR (LS1CL,0)
LSSR (LS2CL,2)
-
-
-
WDSR (WDTO, 3)
Connect WDCONF
to a resistor or to
GND
WDSR (WDERR, 2)
Notes
68.
69.
70.
When in Reset mode a VDD under-voltage condition combined with no VSUP under-voltage (VSUV=0) will send the device to Sleep mode.
Registers to be read when back in Normal Request or Normal mode depending on the fault. Interrupts only generated in Normal, Normal Request and Stop modes
Unless masked, If masked IRQ remains high and the ISR flags are not set.
33912
32
Analog Integrated Circuit Device Data
Freescale Semiconductor