MC33912_10 Datasheet, PDF (19/94 Pages) Freescale Semiconductor, Inc – LIN System Basis Chip with DC Motor Pre-driver and Current Sense

MC33912G5AC / MC34912G5AC
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics (continued)
Characteristics noted under conditions 5.5 V ≤ V_SUP ≤ 18 V, -40°C ≤ T_A ≤ 125°C for the 33912 and -40°C ≤ T_A ≤ 85°C for the
34912, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T_A = 25°C under nominal
conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
LIN PHYSICAL LAYER: DRIVER CHARACTERISTICS FOR FAST SLEW RATE
LIN Fast Slew Rate (Programming mode)
SR_FAST
—
LIN PHYSICAL LAYER: CHARACTERISTICS AND WAKE-UP TIMINGS⁽⁵⁶⁾
Propagation Delay and Symmetry⁽⁵⁷⁾
Propagation Delay of Receiver, t_{REC_PD} = MAX (t_{REC_PDR}, t_{REC_PDF})
Symmetry of Receiver Propagation Delay, t_{REC_PDF} - t_{REC_PDR}
t _{REC_PD}
t _{REC_SYM}
—
- 2.0
Bus Wake-Up Deglitcher (Sleep and Stop modes)^{(58)(62) (59)}
t _PROPWL
42
Bus Wake-Up Event Reported
From Sleep Mode⁽⁶⁰⁾
From Stop Mode⁽⁶¹⁾
t _{WAKE_SLEEP}
—
t _{WAKE_STOP}
9.0
20
—
V / μs
μs
4.2
6.0
—
2.0
70
95
μs
μs
—
1500
27
35
TXD Permanent Dominant State Delay
PULSE WIDTH MODULATION INPUT PIN (PWMIN)
PWMIN pin⁽⁶²⁾
Max. frequency to drive HS and LS output pins
t _TXDDOM
0.65
1.0
1.35
s
f_PWMIN
kHz
-
10
-
Notes
56. V_SUP from 7.0 to 18 V, bus load R_BUS and C_BUS 1.0 nF / 1.0 kΩ, 6.8 nF / 660 Ω, 10 nF / 500 Ω. Measurement thresholds: 50% of TXD
signal to LIN signal threshold defined at each parameter. See Figure 6, page 21.
57. See Figure 9, page 22
58. See Figure 10, page 22 for Sleep and Figure 11, page 22 for Stop Mode.
59. This parameter is tested on automatic tester but has not been monitoring during operating life test.
60. The measurement is done with 1µF capacitor and 0mA current load on V_DD. The value takes into account the delay to charge the
capacitor. The delay is measured between the bus wake-up threshold (V_BUSWU) rising edge of the LIN bus and when V_DD reaches 3.0V.
See Figure 10, page 22. The delay depends of the load and capacitor on V_DD.
61. In Stop Mode, the delay is measured between the bus wake-up threshold (V_BUSWU) and the falling edge of the IRQ pin. See Figure 11,
page 22.
62. This parameter is guaranteed by process monitoring but not production tested.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33912
19