English
Language : 

MC9S08AC16 Datasheet, PDF (192/338 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)
Chapter 10 Timer/PWM Module (S08TPMV3)
10.8.2.1.2 Center-Aligned PWM Case
When CPWMS=1, TOF gets set when the timer counter changes direction from up-counting to
down-counting at the end of the terminal count (the value in the modulo register). In this case the TOF
corresponds to the end of a PWM period.
10.8.2.2 Channel Event Interrupt Description
The meaning of channel interrupts depends on the channel’s current mode (input-capture, output-compare,
edge-aligned PWM, or center-aligned PWM).
10.8.2.2.1 Input Capture Events
When a channel is configured as an input capture channel, the ELSnB:ELSnA control bits select no edge
(off), rising edges, falling edges or any edge as the edge which triggers an input capture event. When the
selected edge is detected, the interrupt flag is set. The flag is cleared by the two-step sequence described
in Section 10.8.2, “Description of Interrupt Operation.”
10.8.2.2.2 Output Compare Events
When a channel is configured as an output compare channel, the interrupt flag is set each time the main
timer counter matches the 16-bit value in the channel value register. The flag is cleared by the two-step
sequence described Section 10.8.2, “Description of Interrupt Operation.”
10.8.2.2.3 PWM End-of-Duty-Cycle Events
For channels configured for PWM operation there are two possibilities. When the channel is configured
for edge-aligned PWM, the channel flag gets set when the timer counter matches the channel value register
which marks the end of the active duty cycle period. When the channel is configured for center-aligned
PWM, the timer count matches the channel value register twice during each PWM cycle. In this CPWM
case, the channel flag is set at the start and at the end of the active duty cycle period which are the times
when the timer counter matches the channel value register. The flag is cleared by the two-step sequence
described Section 10.8.2, “Description of Interrupt Operation.”
MC9S08AC16 Series Data Sheet, Rev. 0
192
PRELIMINARY
Freescale Semiconductor