MC9S08AC16 Datasheet, PDF (15/338 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

Section Number
Title
Page
Chapter 12
Serial Peripheral Interface (S08SPIV3)
12.1 Introduction ...................................................................................................................................213
12.1.1 Features ...........................................................................................................................215
12.1.2 Block Diagrams ..............................................................................................................215
12.1.3 SPI Baud Rate Generation ..............................................................................................217
12.2 External Signal Description ..........................................................................................................218
12.2.1 SPSCK — SPI Serial Clock ............................................................................................218
12.2.2 MOSI — Master Data Out, Slave Data In ......................................................................218
12.2.3 MISO — Master Data In, Slave Data Out ......................................................................218
12.2.4 SS — Slave Select ...........................................................................................................218
12.3 Modes of Operation .......................................................................................................................219
12.3.1 SPI in Stop Modes ..........................................................................................................219
12.4 Register Definition ........................................................................................................................219
12.4.1 SPI Control Register 1 (SPI1C1) ....................................................................................219
12.4.2 SPI Control Register 2 (SPI1C2) ....................................................................................220
12.4.3 SPI Baud Rate Register (SPI1BR) ..................................................................................221
12.4.4 SPI Status Register (SPI1S) ............................................................................................222
12.4.5 SPI Data Register (SPI1D) ..............................................................................................223
12.5 Functional Description ..................................................................................................................224
12.5.1 SPI Clock Formats ..........................................................................................................224
12.5.2 SPI Interrupts ..................................................................................................................227
12.5.3 Mode Fault Detection .....................................................................................................227
Chapter 13
Inter-Integrated Circuit (S08IICV2)
13.1 Introduction ...................................................................................................................................229
13.1.1 Features ...........................................................................................................................231
13.1.2 Modes of Operation ........................................................................................................231
13.1.3 Block Diagram ................................................................................................................232
13.2 External Signal Description ..........................................................................................................232
13.2.1 SCL — Serial Clock Line ...............................................................................................232
13.2.2 SDA — Serial Data Line ................................................................................................232
13.3 Register Definition ........................................................................................................................232
13.3.1 IIC Address Register (IIC1A) .........................................................................................233
13.3.2 IIC Frequency Divider Register (IIC1F) .........................................................................233
13.3.3 IIC Control Register (IIC1C1) ........................................................................................236
13.3.4 IIC Status Register (IIC1S) .............................................................................................237
13.3.5 IIC Data I/O Register (IIC1D) ........................................................................................238
13.3.6 IIC Control Register 2 (IIC1C2) .....................................................................................238
13.4 Functional Description ..................................................................................................................239
13.4.1 IIC Protocol .....................................................................................................................239
MC9S08AC16 Series Data Sheet, Rev. 0
Freescale Semiconductor
PRELIMINARY
15