F75111 Datasheet, PDF (28/45 Pages) Feature Integration Technology Inc. – Low Power GPIO Datasheet

F75111
by 0x2C bit6.
5
GP25_ENDB R/W VSB3V Enable GPIO25 input de-bounce with 7u or 25ms second that selected
by 0x2C bit5.
4
GP24_ENDB R/W VSB3V Enable GPIO24 input de-bounce with 7u or 25ms second that selected
by 0x2C bit4.
3
GP23_ENDB R/W VSB3V Enable GPIO23 input de-bounce with 7u or 25ms second that selected
by 0x2C bit3.
2
GP22_ENDB R/W VSB3V Enable GPIO22 input de-bounce with 7u or 25ms second that selected
by 0x2C bit2.
1
GP21_ENDB R/W VSB3V Enable GPIO21 input de-bounce with 7u or 25ms second that selected
by 0x2C bit1.
0
GP20_ENDB R/W VSB3V Enable GPIO20 input de-bounce with 7u or 25ms second that selected
by 0x2C bit0.
7.30 GPIO2x Pulse Inverse Register – Index 27h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W PWR
Description
7
GP27_PULSINV R/W
VSB3V GPIO 27 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
CR24.
6
GP26_PULSINV R/W
VSB3V GPIO 26 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
CR24.
5
GP25_PULSINV R/W
VSB3V GPIO25 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
CR24.
4
GP24_PULSINV R/W
VSB3V GPIO24 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
CR24.
3
GP23_PULSINV R/W
VSB3V GPIO23 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
CR24.
2
GP22_PULSINV R/W
VSB3V GPIO22 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
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July, 2007
V0.27P