F75111 Datasheet, PDF (12/45 Pages) Feature Integration Technology Inc. – Low Power GPIO Datasheet

7.2 Status Register – Index 02h
F75111
Power-on default [7:0] =0000_000xb
Bit
Name
R/W PWR
Description
7-4 Reserved
RO VSB3V
3
POWR_DOWN RO VSB3V If this bit is set to 1, it mean the chip is in power down mode
2
Reserved
RO VSB3V Read back will be “0”
1
I2C_ADDR
RO VSB3V GPIO serial bus address Select. Internal pull-down 100K ohms are
address 0x9C. If external is pull-up 4.7K ohms, the address is 0x6E.
This pin is trapped during the VSB3VOK.
0
Reserved
RO VSB3V
7.3 Configuration and function select Register – Index 03h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W PWR
Description
7
Reserved
RO VSB3V
6
IRQ_LEVEL
R/W VSB3V Select IRQ Polarity (Level). Set to 1, IRQ is low active and SMI# is high
active. Default, the IRQ is high active and SMI# is low active.
5
IRQ_MODE
R/W VSB3V IRQ/SMI# mode select. 0 – Level mode (IRQ mode), 1 – Pulse Mode
(SMI# mode). If pulse mode is selected, the active pulse is over 100us.
4-3 PIN12_MODE R/W VSB3V 00: GPIO12
01: LED12 IN this mode can use REG 0x06(bit5,4) to select LED
frequency.
10: IRQ
11: WDTOUT11#:
2
PIN11_MODE R/W VSB3V 0: GPIO11
1: LED11 IN this mode can use REG 0x06(bit3,2) to select LED
frequency.
1-0 PIN10_MODE R/W VSB3V 00: GPIO10
01: LED10 IN this mode can use REG 0x06(bit1,0) to select LED
frequency.
10,11: WD_OUT
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July, 2007
V0.27P