F75111 Datasheet, PDF (10/45 Pages) Feature Integration Technology Inc. – Low Power GPIO Datasheet

6. Functional Description
F75111
6.1 General Description
Dedicate GPIO functions. That includes two sets of watchdog timer. One Set of Watchdog timer timeout unit is set to second
and range is 0 to 127 seconds. The other Watchdog timer is set to second or minute and the range is 0 to 256 seconds or minutes.
When the timeout has occurred, that will generate a status bit to indicate it and write one will be clear. All GPIO can be programmed
to logic one or zero or high pulse or low pulse.
6.2 Access Interface
The F75111 provides one serial access interface, I2C Bus, to read/write internal registers. The address of Serial Bus is
configurable by using power-on trapping of standby power VBS3V. The pin 3 (GPIO13/I2C _ADDR) is multi-function pin. During the
VSB3V power-on, this pin serves as input detection of logic high or logic low. This pin is default pull-down resistor with 100K ohms
mapping the Serial Bus address 0x9C (1001_1100). Another Serial Bus address 0x6E (0110_1110) is set when external pull-up
resistor with 10K ohms is connected in this pin.
6.3 The SMBus access timing are shown as follow:
(a) SMBus write to internal address register followed by the data byte
SCL
SDA
0
780
78
1
Start By
Master
00111
Frame 1
Serial Bus Address Byte
SCL (Continued)
SDA (Continued)
0 R/W
Ack
by
111
0
D7 D6 D5 D4 D3 D2 D1 D0
Ack
by
Frame 2
111
Internal Index Register Byte
78
D7 D6 D5 D4 D3 D2 D1 D0
Frame 3
Data Byte
Stop
by
Master
Figure 1. Serial Bus Write to Internal Address Register followed by the Data Byte
(b) Serial bus write to internal address register only
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July, 2007
V0.27P