English
Language : 

FAN54300 Datasheet, PDF (5/43 Pages) Fairchild Semiconductor – USB-Compliant, Dual-Power Input, Single-Cell, Li-Ion Switching Charger with USB-OTG Boost Regulator
Pin Configuration
BOOTV VREF V2V5
A1
A2
A3
SDA BOOTU
A4
A5
VIN
SCL
VBUS
B1
B2
B3
B4
B5
PMID2
C1
C2
SRST
C3
PMID1
C4
C5
SW2
DIS
SW1
D1
D2
D3
D4
D5
GND
E1
E2
E3
E4
E5
LED OTG CSIN VBAT STAT
F1
F2
F3
F4
F5
Figure 4. Pin Assignments (Top View)
A5
A4
A3
A2
A1
B5
B4
B3
B2
B1
C5
C4
C3
C2
C1
D5
D4
D3
D2
D1
E5
E4
E3
E2
E1
F5
F4
F3
F2
F1
Figure 5. Pin Assignments (Bottom View)
Pin Definitions
Pin #
A1
A2
A3
A4
A5
B1, B2
B3
B4, B5
C1, C2
C3
C4, C5
D1, D2
D3
D4, D5
E1–E5
F1
Name
BOOTV
VREF
V2V5
SDA
BOOTU
VIN
SCL
VBUS
PMID2
SRST
PMID1
SW2
DIS
SW1
GND
LED
Description
BOOT. High-side NMOS driver supply. Connect a 10nF capacitor from SW2 to this pin.
Bias Regulator Output. Connect to a 1 F capacitor to PGND. This pin supplies the internal gate drive
and power supply to the IC while charging. Up to 5 mA of current can be provided from this pin to drive
external circuits. This pin is active when either VIN or VBUS are above VBAT.
2.5 V Regulator. Connect to a 1 F capacitor to PGND. Up to 5 mA can be provided from this pin to
drive external circuits. This regulator is powered only when VIN is connected.
I2C Interface Serial Data. This pin should not be left floating.
BOOT. High-side NMOS driver supply. Connect a 10 nF capacitor from SW1 to this pin.
Charger Input Voltage. Bypass with a minimum of 1 F, 16 V capacitor to GND.
I2C Interface Serial Clock. This pin should not be left floating.
USB Input Voltage. Bypass with a 1 F, 16 V capacitor to GND.
Power Input Voltage for VIN Power Source. Power input to the charger regulator, bypass point for
the VIN input current sense, and high-voltage input switch. Bypass with a minimum of 4.7 F, 16 V
capacitor to PGND.
Safety Reset. When LOW, both safety registers are reset to their default values. When HIGH, the
safety registers reset when VBAT drops below VSHORT.
Power Input Voltage for VBUS Power Source. Power input to the VBUS switching charger regulator,
bypass point for the VBUS input current sense, and high-voltage input switch. Bypass with a minimum
of 4.7 F, 6.3 V capacitor to PGND.
Switching Node for VIN Charger. Connect to the output inductor.
Charge Disable. When this pin is HIGH, charging is disabled and no timers are reset. When LOW,
charging is controlled by the I2C registers. This pin does not affect the 32-second timer.
Switching Node for VBUS Charger and OTG Boost. Connect to the output inductor.
Ground. Power return for gate drive and power transistors as well as IC signal ground. The connection
from this pin to the bottoms of the CPMID capacitors should be as short as possible.
Light Emitting Diode Output. Up to 5 mA current source drive from the active PMID indicates the
battery is charging.
© 2010 Fairchild Semiconductor Corporation
FAN54300 • Rev. 1.0.4
5
www.fairchildsemi.com