FAN54300 Datasheet, PDF (31/43 Pages) Fairchild Semiconductor – USB-Compliant, Dual-Power Input, Single-Cell, Li-Ion Switching Charger with USB-OTG Boost Regulator

Boost Fault States
A BOOST fault is enunciated by the STAT pin pulsing and
FAULT status bits under any of the following conditions.
Table 9. Fault Status Bits during Boost Mode
Fault Bit
B2 B1 B0
Fault Description
0 0 0 Normal (no fault)
0 0 1 VBUS > VBUSOVP
VBUS fails to achieve the voltage required to
0
1
0
advance to the next state during soft-start
or sustained (>32 ms) current limit during the
BST state.
0 1 1 VBAT < UVLOBST
1 0 0 N/A: This code will not appear
1 0 1 Thermal shutdown
1 1 0 Timer fault
1 1 1 N/A: This code will not appear
Once a fault is triggered, the OPA_MODE bit is reset.
If the boost was started by setting the OTG pin and OTG_EN
bits, the boost attempts to restart after a fault following a “cool-
off” time of 128 ms.
VREF
The VREF pin provides bias current to the charging circuit
while VIN is the power source. This pin follows PMID2, but its
voltage is limited to 5.8 V. Up to 5 mA of current can be drawn
from the VREF pin to power external devices.
LED Control
An LED driver provides a constant current to drive the anode
of a charge indicator LED. The LED flashes during charging.
The LED_CONTROL register provides control of the LED
driver and can be programmed to flash the LED when
charging is disabled.
LED_CONTROL is reset whenever the IC begins charging in
15-Minute Mode. This occurs after VBUS or VIN POR with a
weak battery when t32SEC is not running or when t32SEC expires.
Recommended PCB Layout
To limit the high-voltage excursions and stresses on the
chargers’ internal switching MOSFETs, it is critical to limit the
total loop length from PMID back to the GND return, including
the length of the CMID bypass capacitors. The layout below
achieves this goal.
Figure 54. Recommended Layout for High-Current Charging, Using 2520 Inductors
© 2010 Fairchild Semiconductor Corporation
FAN54300 • Rev. 1.0.4
31
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