FAN54300 Datasheet, PDF (30/43 Pages) Fairchild Semiconductor – USB-Compliant, Dual-Power Input, Single-Cell, Li-Ion Switching Charger with USB-OTG Boost Regulator

Boost PWM Control
The IC uses a minimum on-time, and computed minimum off-
time, to regulate VBUS. The computed off-time is designed to
keep the switching frequency constant near 3 MHz when the
regulator’s inductor current is continuous (CCM).
The regulator achieves excellent transient response by
employing current-mode modulation. This technique causes
the regulator to exhibit a load line. During CCM Mode, the
output voltage drops slightly as the input current rises. With a
constant VBAT, this appears as a constant output resistance.
The “droop” caused by the output resistance when a load is
applied allows the regulator to respond smoothly to load
transients with no undershoot from the load line. This can be
seen in Figure 34.
500
450
400
350
300
250
200
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Battery Voltage, VBAT (V)
Figure 53. Output Resistance (ROUT)
VBUS as a function of ILOAD can be computed when the
regulator is in PWM Mode (continuous conduction) as:
V_BUS  5.05  R_OUT I_LOAD
EQ. 1
At 3.6 VBAT and ILOAD = 300 mA, VBUS would droop to about:
V_BUS  5.05  0.32 0.3  4.95V
EQ. 2
At 2.7 VBAT, with ILOAD = 200 mA, VBUS would droop to about:
V_BUS  5.05  0.45  0.2  4.96V
EQ. 3
Pulse Frequency Modulated (PFM) Mode
If VBUS > VREFBOOST (nominally 5.05 V) when the minimum off
time has ended, the regulator enters PFM Mode. Boost pulses
are inhibited until VBUS < VREFBOOST. The minimum on-time is
increased to enable the output to pump up sufficiently with
each PFM boost pulse. The regulator behaves like a constant
on-time regulator, with the bottom of its output voltage ripple at
5.05 V in PFM Mode. Since PFM voltage ripple is typically
20 mVP-P, VBUS(PFM) is nominally 5.06 V.
Table 8. Boost PWM Operating States
State
Description
Invoked When:
SCHK
LIN1
SS
BST
Short-Circuit Check
Linear Startup
Boost Soft-Start
Boost Operating Mode
VBAT > VBUS and
VBUS < 1V
VBAT > 1V
VBUS < VBST
VBAT > VUVLO and
SS completed
Shutdown State
When the boost regulator is shut down, Q3 is off, preventing
current flow from VBAT to VBUS. Q1 is also off, which
prevents current flow from VBUS to VBAT.
SCHK State
The SCHK state turns on a switch with an on-resistance of
about 120  from VBAT to VBUS and waits for VBUS to rise to
about 1 V before proceeding with boost soft-start. This
prevents high current drain from the battery, which could occur
if Q3 is turned on into a short circuit. If VBUS fails to rise above
1 V within 8 ms, a boost overload fault is enunciated.
LIN1 State
A portion of Q3 is turned on (on-resistance = 1 ) to charge
VBUS from 1V to VPMID1. VPMID1 is about 0.7 V below VBAT. This
state ends when VPMID1 - VBUS < 0.4 V. If VBUS fails to achieve
VPMID1 – 0.4 V within 512 s, a boost overload fault is
enunciated.
SS State
When VBUS > VPMID1 – 0.4 V, the boost regulator begins
switching. The output slews up until VBUS is within 10% of its
setpoint; at which time, the regulation loop is closed and the
boost reference is digitally stepped to 5.07 V.
If the output fails to achieve 90% of its setpoint (VBST) within
512 s, a boost overload fault is enunciated.
BST State
This is the normal operating mode of the regulator.
Thermal
If the die temperature reaches 120°C while the boost and
charger are both operating, charging stops for at least 10 ms,
then resumes when the die temperature falls below 120°C.
© 2010 Fairchild Semiconductor Corporation
FAN54300 • Rev. 1.0.4
30
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