FAN54300 Datasheet, PDF (28/43 Pages) Fairchild Semiconductor – USB-Compliant, Dual-Power Input, Single-Cell, Li-Ion Switching Charger with USB-OTG Boost Regulator

Charge Start
Start t15MIN
t15MIN
Active?
Reset Registers
Start t32SEC
Stop t15MIN
YES
NO
YES
I²C Write
NO
received?
YES
t32SEC
Expired?
NO
t15MIN
Expired?
NO
Continue
Charging
Timer Fault :
Set CE#
YES
Figure 52. Timer Flow Chart
Special Charger
The IC limits input current in case a current-limited charger is
supplying VBUS or VIN. The IC slowly increases the charging
current until either:
 IBUSLIM or ICHARGE is reached; or
 VPWRIN = VSP where VPWRIN is the selected input power
source (see Table 4).
If VPWRIN collapses to VSP when current is ramping up, the IC
charges with an input current that keeps VPWRIN = VSP. When
the VSP control loop is limiting the charge current, the SP bit
( REG5[4] ) is set. VSP default value is 4.53 V, but it can be
programmed by REG5[2:0].
Safety Settings
A SAFETY register ( REG6 ) prevents the values in OREG
(REG2[7:2] ) and ICHG ( REG4[6:3] ) from exceeding the
values of the VSAFE and ISAFE values.
After VBAT rises above VSHORT, the SAFETY register is loaded
with its default value and may be written only before any other
register is written. After writing to any other register, the
SAFETY register is locked until VBAT falls below VSHORT. The
SAFETY register is reset whenever the SRST pin is LOW.
ISAFE and VSAFE establish values that limit the maximum
values of ICHG and OREG used by the control logic. If the
host attempts to write a value higher than VSAFE or ISAFE to
OREG or ICHG, respectively; the VSAFE, ISAFE value
appears as the OREG, ICHG register value, respectively.
For the SAFETY_U register, any attempt to write an ISAFE
value higher than 10 (0AH) results in a value of 10 being
written to the ISAFE bits. See Table 21 for VSAFE values and
Table 20 and Table 26 for ISAFE values.
Thermal Regulation and Protection
When the IC’s junction temperature reaches TCF (about
120°C) the charger reduces its output current to prevent
overheating. If the temperature continues to increase, the
current is reduced to 0 when the junction is 10°C above TCF. If
the temperature increases beyond TSHUTDOWN, charging is
suspended, the FAULT bits are set to 101, and SAT is pulsed.
In Suspend Mode, all timers stop and the state of the IC’s
logic is preserved. Charging resumes after the die cools to
about 10°C below TSHUTDOWN.
Charge Mode Input Supply Protection
Sleep Mode
When VBUS and VIN are both below VBAT, the IC enters Sleep
Mode. To prevent the battery from discharging into VBUS,
reverse current is prevented by body switching Q1 when
PMID1 falls below VBAT.
Similarly, when VIN falls below VBAT, Q4 turns off, blocking
battery current flow into VIN.
Input Supply Low-Voltage Detection
The IC continuously monitors VPWRIN during charging. If the
input voltage for the active charging source falls below 3.7 V,
the IC terminates charging, pulses the STAT pin, sets STAT
bits to 11, and sets the FAULT bits to 011 for the appropriate
input source.
If the power source recovers above the VIN(MIN) rising threshold
after timer tINT (about two seconds), the charging process is
repeated. This prevents the USB power bus from collapsing or
oscillating when the IC is connected to a suspended USB port
or an OTG device with low current capability.
© 2010 Fairchild Semiconductor Corporation
FAN54300 • Rev. 1.0.4
28
www.fairchildsemi.com