FAN54300 Datasheet, PDF (36/43 Pages) Fairchild Semiconductor – USB-Compliant, Dual-Power Input, Single-Cell, Li-Ion Switching Charger with USB-OTG Boost Regulator

Bit Name Type
Description
IBAT_U
Reg Addr: 4
Slave Addr: D6 Default = 0000 1001
7 RESETU
W
Writing a 1 resets all registers programmed with slave address D4, except the Safety register
(Reg6), to their defaults. Writing a 0 has no effect. Read returns 0.
Sets the maximum charge current (ICHARGE) when charging from VBUS when IO_LEVELU = 0.
6:4 ICHGU
3 Reserved
R/W
R
Table 17. I_CHARGE as a Function of the ICHGU Bits and R_SENSE Resistor Value
BIN
HEX ^{VRSENSE IOCHARGE (mA)}
(mV) 68m 100m IOREF
000
00 37.4
550
374 704
001
01 44.2
650
442 832
010
02 51.0
750
510 960
011
03 57.8
850
578 1088
100
04 64.6
950
646 1216
101
05 71.4 1,050 714 1344
110
06 78.2 1,150 782 1472
111
07 85.0 1,250 850 1600
Note that when charging from a USB source, charger current is limited to 1250 mA (RSENSE = 68m).
This bit returns 1.
Sets the current at which charging terminates when charging from VBUS if the TE bit is set.
2:0 ITERMU
R/W
Table 18. I_CHARGE Termination Current as a Function of ITERM bits and R_SENSE
Resistor Value
BIN
000
HEX ^{VRSENSE ITERM (mA)}
(mV) 68m 100m
00 3.3
49 33
001 01 6.6
97 66
010 02 9.9 146 99
011 03 13.2 194 132
100 04 16.5 243 165
101 05 19.8 291 198
110 06 23.1 340 231
111 07 26.4 388 264
Bit Name Type
SP_CHARGER_U
7 Reserved
R
6 VBUS_CON R
5 IO_LEVEL R/W1:
0:
4
SPU
R
3 VIN_CON
R
Description
Reg Addr: 5
Slave Addr: D6 Default = 0x1x x100
This bit returns 0.
Mirror of INPUT_STATUS[5] (see INPUT_STATUS register description)
0: Output current is controlled by IOCHARGE bits for charging from VBUS.
When charging from VBUS, the voltage across RSENSE for output current control is set to
22.1 mV (325 mA for RSENSE = 68 m, 221 mA for 100 m ).
Special charger loop is not active. Input power source is able to stay above VSP. SPU = 0 when
VBUS is not PWM charging.
1: Special charger loop is active and controlling the charging current.
Mirror of INPUT_STATUS[7] (see INPUT_STATUS register description)
© 2010 Fairchild Semiconductor Corporation
FAN54300 • Rev. 1.0.4
36
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