FMS9874 Datasheet, PDF (11/25 Pages) Fairchild Semiconductor – Graphics Digitizer - 3x8-Bit, 108Ms/s Triple Video A/D Converter with Clamps

FMS9874
PRODUCT SPECIFICATION
RGBIN
HSIN
PXCK
P0 P1 P2 P3 P4 P5 P6 P7
HS
SCK
5.5 PIPE DELAY
DATACK
D_7-0
HSOUT
D1 D3 D5 D7
Figure 9. Alternate Pixel Sampling Mode, (Even Pixels)
RGBIN P0 P1 P2 P3 P4 P5 P6 P7
HSIN
PXCK
HS
SCK
5 PIPE DELAY
DATACK
D_7-0
HSOUT
D0 D2 D4 D6
Figure 10. Alternate Pixel Sampling Mode, (Odd Pixels)
Alternate Pixel Sampling Mode
A logic H on the CKINV pin inverts the sampling phase of
SCK. In the Alternate Pixel Sampling Mode:
1. The PLL is run at half rate. SCK, DCK and DCK are
half rate.
2. CKINV is toggled between frames.
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
Figure 11. Odd and Even Pixels in a Frame
On one frame, even pixels are sampled. On the other, odd
pixels are sampled.
Alternate Pixel Sampling is similar to interlacing used in
broadcast video, except that the columns of pixels are inter-
laced instead of lines.
O1E1O1E1O1E1O1E1O1E1O1E1O1E1
O1E1O1E1O1E1O1E1O1E1O1E1O1E1
O1E1O1E1O1E1O1E1O1E1O1E1O1E1
O1E1O1E1O1E1O1E1O1E1O1E1O1E1
O1E1O1E1O1E1O1E1O1E1O1E1O1E1
O1E1O1E1O1E1O1E1O1E1O1E1O1E1
O1E1O1E1O1E1O1E1O1E1O1E1O1E1
O1E1O1E1O1E1O1E1O1E1O1E1O1E1
O1E1O1E1O1E1O1E1O1E1O1E1O1E1
O1E1O1E1O1E1O1E1O1E1O1E1O1E1
O1E1O1E1O1E1O1E1O1E1O1E1O1E1
Figure 12. Odd Pixels from Frame 1
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