XRT75R12D_06 Datasheet, PDF (78/134 Pages) Exar Corporation – TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET

XRT75R12D
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER REV. 1.0.1
ALARM STATUS REGISTER - CHANNEL N ADDRESS LOCATION = 0XM3
BIT NUMBER
NAME
TYPE
DESCRIPTION
3
FL Alarm Declared R/O FL (FIFO Limit) Alarm Declared:
This READ-ONLY bit-field indicates whether or not the Jitter Attenuator
block (within Channel_n) is currently declaring the FIFO Limit Alarm.
The Jitter Attenuator block will declare the FIFO Limit Alarm anytime the Jit-
ter Attenuator FIFO comes within two bit-periods of either overflowing or
under-running.
Conversely, the Jitter Attenuator block will clear the FIFO Limit Alarm any-
time the Jitter Attenuator FIFO is NO longer within two bit-periods of either
overflowing or under-running.
Typically, this Alarm will only be declared whenever there is a very serious
problem with timing or jitter in the system.
0 - Indicates that the Jitter Attenuator block (within Channel_n) is NOT cur-
rently declaring the FIFO Limit Alarm condition.
1 - Indicates that the Jitter Attenuator block (within Channel_n) is currently
declaring the FIFO Limit Alarm condition.
NOTE: This bit-field is only active if the Jitter Attenuator (within Channel_n)
has been enabled.
2
Receive LOL Condi- R/O Receive LOL (Loss of Lock) Condition Declared:
tion Declared
This READ-ONLY bit-field indicates whether or not the Receive Section
(within Channel_n) is currently declaring the LOL (Loss of Lock) condition.
The Receive Section (of Channel_n) will declare the LOL Condition, if the
frequency of the Recovered Clock signal differs from that of the reference
clock programmed for that channel (from the appropriate oscillator or the
SFM clock synthesizer if in that mode) by 0.5% (or 5000ppm) or more .
0 - Indicates that the Receive Section of Channel_n is NOT currently declar-
ing the LOL Condition.
1 - Indicates that the Receive Section of Channel_n is currently declaring the
LOL Condition and the recovered clock differs by more than 0.5%..
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