XRT75R12D_06 Datasheet, PDF (31/134 Pages) Exar Corporation – TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET

XRT75R12D
REV. 1.0.1 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
3.5.5 Muting the Recovered Data with LOS condition:
When the LOS condition is declared, the clock recovery circuit locks into the reference clock applied to the
internal master clock outputs this clock onto the RxClk_n output pin. The data on the RxPOS_n and RxNEG_n
pins can be forced to zero by setting the LOSMUT_n bits in the individual channel control register to “1”.
NOTE: When the LOS condition is cleared, the recovered data is output on RxPOS_n and RxNEG_n pins.
FIGURE 12. RECEIVER DATA OUTPUT AND CODE VIOLATION TIMING
RxClk
LCV
RPOS or
RNEG
t_RRX
t_LCVO
t_CO
t_FRX
SYMBOL
PARAMETER
RxClk Duty Cycle
RxClk Frequency
E3
DS-3
STS-1
t_RRX RxClk rise time (10% o 90%)
t_FRX RxClk falling time (10% to 90%)
t_CO RxClk to RPOS/RNEG delay time
t_LCVO RxClk to rising edge of LCV output delay
MIN
TYP
MAX
UNITS
45
50
55
%
34.368
44.736
51.84
2
4
2
4
4
2.5
MHz
MHz
MHz
ns
ns
ns
ns
3.6 B3ZS/HDB3 Decoder
The decoder block takes the output from the clock and data recovery block and decodes the B3ZS (for DS3 or
STS-1) or HDB3 (for E3) encoded line signal and detects any coding errors or excessive zeros in the data
stream. Whenever the input signal violates the B3ZS or HDB3 coding sequence for bipolar violation or
contains three (for B3ZS) or four (for HDB3) or more consecutive zeros, an active “High” pulse is generated on
the RLCV_n output pins to indicate line code violation.
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