XRT75R12D_06 Datasheet, PDF (14/134 Pages) Exar Corporation – TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET

XRT75R12D
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER REV. 1.0.1
CLOCK INTERFACE
PIN #
SIGNAL NAME
R5
SFM_EN
R1
E3Clk
T1
DS3Clk
U1 STS-1Clk/12M
C26
CLKOUT0
W22
CLKOUT1
K23
CLKOUT2
W24
CLKOUT3
J25
CLKOUT4
V25
CLKOUT5
J2
CLKOUT6
V2
CLKOUT7
K4
CLKOUT8
W3
CLKOUT9
C1
CLKOUT10
W5
CLKOUT11
TYPE
I
I
I
I
O
DESCRIPTION
Single Frequency Mode Enable
This input pin is used to configure the XRT75R12D to operate in the SFM (Sin-
gle Frequency Mode).
When this feature is invoked, the SFM Synthesizer will become active. By
applying a 12.288MHz clock signal to the STS-1Clk/12M pin, the XRT75R12D
will generate all of the appropriate clock signals (e.g., 34.368MHz, 44.736MHz
or 51.84). The XRT75R12D internal circuitry will route each of these synthe-
sized clock signals to the appropriate nodes of the corresponding channels in
the XRT75R12D.
"Low" - Disables the Single Frequency Mode. In this setting, the user is
required to supply to the E3CLK, DS3CLK or STS-1CLK input pins all of the rel-
evant clock signals that are to be used within the chip.
"High" - Enables the Single-Frequency Mode.
NOTE: This input pin is internally pulled low.
E3 Clock Input (34.368 MHz ± 20 ppm)
If any one of the channels is configured in E3 mode, a reference clock of 34.368
MHz ± 20 ppm is applied to this input pin. If the LIU is used in E3 mode only,
this pin must be connected to the DS3Clk input pin to have access to the inter-
nal microprocessor.
NOTE: SFM mode negates the need for this clock
DS3 Clock Input (44.736 MHz ± 20 ppm)
If any one of the channels is configured in DS3 mode, a reference clock of
44.736 MHz ± 20 ppm is applied to this input pin.
NOTE: SFM mode negates the need for this clock
STS-1 Clock Input (51.84 MHz ± 20 ppm)
If any one of the channels is configured in STS-1 mode, a reference clock of
51.84MHz ± 20 ppm is applied to this input pin. If the LIU is used in STS-1
mode only, this pin must be connected to the DS3Clk input pin to have access
to the internal microprocessor.
Single Frequency Mode Clock Input (12.288MHz ± 20 ppm)
In Single Frequency Mode, a reference clock of 12.288 MHz ± 20 ppm is con-
nected to this pin and the internal clock synthesizer generates the appropriate
clock frequencies based on the configuration of the rates (E3, DS3 or STS-1).
Reference Clock Out
A reference clock pin is provided for each channel that will supply a precise data
rate frequency derived from either the Clock input pin (E3Clk, DS3Clk, or STS-
1Clk) or the 12.288MHz input in SFM mode. This frequency will be as stable as
the original source. It is designed to provide the attached framer with its appro-
priate reference clock.
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