XR17L152 Datasheet, PDF (35/55 Pages) Exar Corporation – 3.3V PCI BUS DUAL UART

XR17L152
3.3V PCI BUS DUAL UART
REV. 1.1.0
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DISCONTINUED
TABLE 13: TRANSMIT AND RECEIVE FIFO TRIGGER LEVEL SELECTION
FCTR FCTR FCR
BIT-7 BIT-6 BIT-7
0
0
0
0
1
1
0
1
0
0
1
1
1
0
0
0
1
1
1
1
X
FCR
BIT-6
0
1
0
1
0
1
0
1
0
1
0
1
X
FCR
BIT-5
0
0
0
1
1
0
0
1
1
X
FCR
RECEIVE
TRANSMIT
BIT-4 TRIGGER LEVEL TRIGGER LEVEL
COMPATIBILITY
0
1 (default)
4
8
14
1 (default)
Table-A. 16C550, 16C2550,
16C2552, 16C554, 16C580
compatible.
0
1
0
1
8
16
24
28
16
Table-B. 16C650A compatible.
8
24
30
0
1
0
1
8
16
56
60
8
Table-C. 16C654 compatible.
16
32
56
X Programmable Programmable Table-D. 16C850, 16C2850,
via RXTRG reg- via TXTRG reg- 16C2852, 16C854, 16C864,
ister
ister
16C872 compatible.
Line Control Register (LCR)
The Line Control Register is used to specify the asynchronous data communication format. The word or
character length, the number of stop bits, and the parity are selected by writing the appropriate bits in this
register.
LCR[1:0]: TX and RX Word Length Select
These two bits specify the word length to be transmitted or received.
BIT-1
0
0
1
1
BIT-0
0
1
0
1
WORD LENGTH
5 (default)
6
7
8
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