XR28V382IL32-0A Datasheet, PDF (3/39 Pages) Exar Corporation – 3.3V DUAL LPC UART WITH 128-BYTE FIFO

REV. 1.0.1
PIN DESCRIPTIONS
Pin Description
NAME
32-QFN
PIN#
LPC BUS INTERFACE
PCIRST#
32
LAD3
2
LAD2
3
LAD1
4
LAD0
5
LCLK
6
LFRAME#
7
SERIRQ
12
UART I/O INTERFACE
CTSB#
10
DSRB#
11
CDB#
13
RIB#
14
RTSB#/
PS_CONF_KEY1/ 22
RS485
DTRB#/
PS_2E0_IRQB
23
RXB
24
TXB/
PS_2F8_IRQB
25
CTSA#
15
XR28V382
3.3V DUAL LPC UART WITH 128-BYTE FIFO
TYPE
DESCRIPTION
I Active low Reset signal.
I/O Multiplexed address / data bus [3:0]. See ’Section 1.2, LPC Bus Interface’.
I LPC clock input up to 33.3MHz.
I
Active low LPC Frame signal indicates start of a new cycle or termination of a
broken cycle.
Bi-directional pin for sending interrupts. By default this pin is tri-stated when idle.
I/O
Interrupts can be active high or low. See ’Section 1.2.1, Serial IRQ’ and See
’Section 2.2.1.3, Interrupt Enable Register (IER) - Read/Write’ for more infor-
mation regarding interrupts.
I
UART Channel B Clear-to-Send (active low) or general purpose input. This input
should be connected to VCC or GND when not used.
I
UART Channel BChannel B Data-Set-Ready (active low) or general purpose
input. This input should be connected to VCC or GND when not used.
I
UART Channel B Carrier-Detect (active low) or general purpose input. This input
should be connected to VCC or GND when not used.
I
UART Channel B Ring-Indicator (active low) or general purpose input. This input
should be connected to VCC or GND when not used.
UART Channel B Request-to-Send (active low) or general purpose output or aut-
matic RS485 Half Duplex control pin. See ’Section 1.4.4, Auto RS-485 Half-
O Duplex Control’.
This pin has an internal pull-up resistor and is sampled upon power-up or reset
See Table 1 ’UART Power On Configuration’.
UART Channel B Data-Terminal-Ready (active low) or general purpose output .
This pin has an internal pull-up resistor and is sampled upon power-up or reset.
O This will determine the default register settings for UART channel B. The regis-
ters can later be modified by the software. See Table 1 ’UART Power On Con-
figuration’.
I
UART Channel B Receive data. Normal receive data input must idle at logic 1
condition. This input should be connected to VCC or GND when not used.
UART Channel B Transmit Data. The TXB signal will be a logic 1 during reset or
idle (no data). If it is not used, leave it unconnected.
O ^{This pin has an internal pull-up resistor and is sampled upon power-up or reset.}
This will determine the default register settings for UART Channel B. The regis-
ters can later be modified by the software. See Table 1 ’UART Power On Con-
figuration’.
I
UART Channel A Clear-to-Send (active low) or general purpose input. This input
should be connected to VCC or GND when not used.
3