XRT16C854 Datasheet, PDF (23/54 Pages) Exar Corporation – 2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO

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REV. 3.0.1
XR16C854/854D
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
3.0 UART INTERNAL REGISTERS
Each UART channel in the 854 has its own set of configuration registers selected by address lines A0, A1 and
A2 with a specific channel selected (See Table 1 and Table 2). The complete register set is shown on Table 8
and Table 9.
TABLE 8: UART CHANNEL A AND B UART INTERNAL REGISTERS
A2,A1,A0 ADDRESSES
REGISTER
READ/WRITE
COMMENTS
16C550 COMPATIBLE REGISTERS
0 00
RHR - Receive Holding Register
THR - Transmit Holding Register
Read-only
Write-only
LCR[7] = 0
0 00
DLL - Div Latch Low Byte
Read/Write
LCR[7] = 1, LCR ≠ 0xBF
0 01
DLM - Div Latch High Byte
Read/Write
LCR[7] = 1, LCR ≠ 0xBF
0 00
DREV - Device Revision Code
Read-only
DLL, DLM = 0x00,
LCR[7] = 1, LCR ≠ 0xBF
0 01
DVID - Device Identification Code
Read-only
DLL, DLM = 0x00,
LCR[7] = 1, LCR ≠ 0xBF
0 01
IER - Interrupt Enable Register
Read/Write
LCR[7] = 0
0 10
ISR - Interrupt Status Register
FCR - FIFO Control Register
Read-only
Write-only
LCR[7] = 0
0 11
LCR - Line Control Register
Read/Write
1 00
MCR - Modem Control Register
Read/Write
LCR[7] = 0
1 01
LSR - Line Status Register
Reserved
Read-only
Write-only
LCR[7] = 0
1 10
MSR - Modem Status Register
Reserved
Read-only
Write-only
LCR[7] = 0
1 11
SPR - Scratch Pad Register
Read/Write
LCR[7] = 0, FCTR[6] = 0
1 11
FLVL - TX/RX FIFO Level Counter Register
Read-only
LCR[7] = 0, FCTR[6] = 1
1 11
EMSR - Enhanced Mode Select Register
Write-only
LCR[7] = 0, FCTR[6] = 1
ENHANCED REGISTERS
0 00
TRG - TX/RX FIFO Trigger Level Reg
FC - TX/RX FIFO Level Counter Register
Write-only
Read-only
LCR = 0xBF
0 01
FCTR - Feature Control Reg
Read/Write
LCR = 0xBF
0 10
EFR - Enhanced Function Reg
Read/Write
LCR = 0xBF
1 00
Xon-1 - Xon Character 1
Read/Write
LCR = 0xBF
1 01
Xon-2 - Xon Character 2
Read/Write
LCR = 0xBF
1 10
Xoff-1 - Xoff Character 1
Read/Write
LCR = 0xBF
1 11
Xoff-2 - Xoff Character 2
Read/Write
LCR = 0xBF
X XX
FSTAT - FIFO Status Register
Read-only
FSRS# pin is logic 0
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