XRD98L63 Datasheet, PDF (13/41 Pages) Exar Corporation – CCD Image Digitizers with CDS, PGA and 12-Bit A/D

XRD98L63
Readback Register
Readback
default
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
RBenable RBreg[8] RBreg[7] RBreg[6] RBreg[5] RBreg[4] RBreg[3] RBreg[2] RBreg[1] RBreg[0]
0
0
0
0
0
0
0
0
0
0
RBenable, used to enable the Readback feature. 0=Readback OFF. 1=ReadBacK ON.
RBreg[8:6], used to select internal Calibration or Multiple Gain registers for Readback.
RBreg[5:0], used to select internal Serial Interface registers for Readback.
See the “Serial Interface Readback” section (pg. 14) for more information.
Reset Register
Reset
default
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Reset
0
0
0
0
0
0
0
0
0
0
The Reset bit is used to reset the chip to power-up default conditions.
Program Reset=1 to reset the chip. After all internal registers are reset, the Reset bit will clear itself.
See the “Chip Reset” section (pg. 34) for more information.
Rev.1.01
13