LM3S1958 Datasheet, PDF (83/435 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S1958 Microcontroller
Register 16: Device Capabilities 3 (DC3), offset 0x018
This register is predefined by the part and can be used to verify features.
Device Capabilities 3 (DC3)
Base 0x400F.E000
Offset 0x018
Type RO, reset 0x3FFF.0000
31
30
29
28
reserved
CCP5 CCP4
Type RO
RO
RO
RO
Reset
0
0
1
1
27
CCP3
RO
1
26
CCP2
RO
1
25
CCP1
RO
1
24
CCP0
RO
1
23
ADC7
RO
1
22
ADC6
RO
1
21
ADC5
RO
1
20
ADC4
RO
1
19
ADC3
RO
1
18
ADC2
RO
1
17
ADC1
RO
1
16
ADC0
RO
1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15:0
Name
reserved
CCP5
CCP4
CCP3
CCP2
CCP1
CCP0
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADC1
ADC0
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
When set, indicates that Capture/Compare/PWM pin 5 is present.
When set, indicates that Capture/Compare/PWM pin 4 is present.
When set, indicates that Capture/Compare/PWM pin 3 is present.
When set, indicates that Capture/Compare/PWM pin 2 is present.
When set, indicates that Capture/Compare/PWM pin 1 is present.
When set, indicates that Capture/Compare/PWM pin 0 is present.
When set, indicates that ADC pin 7 is present.
When set, indicates that ADC pin 6 is present.
When set, indicates that ADC pin 5 is present.
When set, indicates that ADC pin 4 is present.
When set, indicates that ADC pin 3 is present.
When set, indicates that ADC pin 2 is present.
When set, indicates that ADC pin 1 is present.
When set, indicates that ADC pin 0 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
June 14, 2007
83
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