LM3S1958 Datasheet, PDF (14/435 Pages) List of Unclassifed Manufacturers – Microcontroller

Table of Contents
Register 32: GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 188
Timers ........................................................................................................................................... 189
Register 1: GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 201
Register 2: GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 202
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 203
Register 4: GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 204
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 206
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 208
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 209
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 210
Register 9: GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 212
Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 213
Register 11: GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 214
Register 12: GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 215
Register 13: GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 216
Register 14: GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 217
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 218
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 219
Register 17: GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 220
Register 18: GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 221
Watchdog Timer ........................................................................................................................... 222
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 225
Register 2: Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 226
Register 3: Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 227
Register 4: Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 228
Register 5: Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 229
Register 6: Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 230
Register 7: Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 231
Register 8: Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 232
Register 9: Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 233
Register 10: Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 234
Register 11: Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 235
Register 12: Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 236
Register 13: Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 237
Register 14: Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 238
Register 15: Watchdog Peripheral Identification 2 (WDTPeriphID2), offset 0xFE8 ................................. 239
Register 16: Watchdog Peripheral Identification 3 (WDTPeriphID3), offset 0xFEC ................................. 240
Register 17: Watchdog PrimeCell Identification 0 (WDTPCellID0), offset 0xFF0 .................................... 241
Register 18: Watchdog PrimeCell Identification 1 (WDTPCellID1), offset 0xFF4 .................................... 242
Register 19: Watchdog PrimeCell Identification 2 (WDTPCellID2), offset 0xFF8 .................................... 243
Register 20: Watchdog PrimeCell Identification 3 (WDTPCellID3 ), offset 0xFFC .................................. 244
ADC ............................................................................................................................................... 245
Register 1: ADC Active Sample Sequencer (ADCACTSS), offset 0x000 ............................................. 252
Register 2: ADC Raw Interrupt Status (ADCRIS), offset 0x004 ........................................................... 253
Register 3: ADC Interrupt Mask (ADCIM), offset 0x008 ..................................................................... 254
Register 4: ADC Interrupt Status and Clear (ADCISC), offset 0x00C .................................................. 255
Register 5: ADC Overflow Status (ADCOSTAT), offset 0x010 ............................................................ 256
Register 6: ADC Event Multiplexer Select (ADCEMUX), offset 0x014 ................................................. 257
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June 14, 2007
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