LM3S1958 Datasheet, PDF (203/435 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S1958 Microcontroller
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008
This register configures the GPTM based on the configuration selected in the GPTMCFG register.
When in 16-bit PWM mode, set the TBAMS bit to 0x1, the TBCMR bit to 0x0, and the TBMR field to
0x2.
GPTM TimerB Mode (GPTMTBMR)
Timer0 base: 0x4003.0000
Timer1 base: 0x4003.1000
Timer2 base: 0x4003.2000
Timer3 base: 0x4003.3000
Offset 0x008
Type R/W, reset 0x0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
TBAMS TBCMR
TBMR
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:4
3
2
1:0
Name
reserved
TBAMS
TBCMR
TBMR
Type
RO
R/W
R/W
R/W
Reset
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPTM TimerB Alternate Mode Select
0: Capture mode is enabled.
1: PWM mode is enabled.
Note: To enable PWM mode, you must also clear the TBCMR bit and
set the TBMR field to 0x2.
GPTM TimerB Capture Mode
0: Edge-Count mode.
1: Edge-Time mode.
GPTM TimerB Mode
0x0: Reserved.
0x1: One-Shot Timer mode.
0x2: Periodic Timer mode.
0x3: Capture mode.
The timer mode is based on the timer configuration defined by bits 2:0
in the GPTMCFG register.
In 16-bit timer configuration, these bits control the 16-bit timer modes
for TimerB.
In 32-bit timer configuration, this register’s contents are ignored and
GPTMTAMR is used.
June 14, 2007
203
Luminary Micro Confidential-Advance Product Information