LM3S1958 Datasheet, PDF (5/435 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S1958 Microcontroller
10.2 Functional Description ............................................................................................................. 190
10.2.1 GPTM Reset Conditions .......................................................................................................... 190
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 190
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 192
10.3 Initialization and Configuration ................................................................................................. 196
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 196
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 197
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 197
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 198
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 198
10.3.6 16-Bit PWM Mode ................................................................................................................... 199
10.4 Register Map .......................................................................................................................... 199
10.5 Register Descriptions .............................................................................................................. 200
11 Watchdog Timer ............................................................................................................... 222
11.1 Block Diagram ........................................................................................................................ 222
11.2 Functional Description ............................................................................................................. 222
11.3 Initialization and Configuration ................................................................................................. 223
11.4 Register Map .......................................................................................................................... 223
11.5 Register Descriptions .............................................................................................................. 224
12 ADC ................................................................................................................................... 245
12.1 Block Diagram ........................................................................................................................ 246
12.2 Functional Description ............................................................................................................. 246
12.2.1 Sample Sequencers ................................................................................................................ 246
12.2.2 Module Control ........................................................................................................................ 247
12.2.3 Hardware Sample Averaging Circuit ......................................................................................... 248
12.2.4 Analog-to-Digital Converter ...................................................................................................... 248
12.2.5 Test Modes ............................................................................................................................. 248
12.2.6 Internal Temperature Sensor .................................................................................................... 248
12.3 Initialization and Configuration ................................................................................................. 249
12.3.1 Module Initialization ................................................................................................................. 249
12.3.2 Sample Sequencer Configuration ............................................................................................. 249
12.4 Register Map .......................................................................................................................... 250
12.5 Register Descriptions .............................................................................................................. 251
13 UART ................................................................................................................................. 278
13.1 Block Diagram ........................................................................................................................ 279
13.2 Functional Description ............................................................................................................. 279
13.2.1 Transmit/Receive Logic ........................................................................................................... 279
13.2.2 Baud-Rate Generation ............................................................................................................. 280
13.2.3 Data Transmission .................................................................................................................. 281
13.2.4 Serial IR (SIR) ......................................................................................................................... 281
13.2.5 FIFO Operation ....................................................................................................................... 282
13.2.6 Interrupts ................................................................................................................................ 282
13.2.7 Loopback Operation ................................................................................................................ 283
13.2.8 IrDA SIR block ........................................................................................................................ 283
13.3 Initialization and Configuration ................................................................................................. 283
13.4 Register Map .......................................................................................................................... 284
13.5 Register Descriptions .............................................................................................................. 285
June 14, 2007
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