W78E054D Datasheet, PDF (43/89 Pages) List of Unclassifed Manufacturers – 8-bit microcontroller

W78E054D/W78E052D Data Sheet
11 POWER MANAGEMENT
The W78E054D/W78E052D has several features that help the user to control the power consumption
of the device. The power saved features have basically the POWER DOWN mode and the IDLE mode
of operation.
11.1 Idle Mode
The user can put the device into idle mode by writing 1 to the bit PCON.0. The instruction that sets the
idle bit is the last instruction that will be executed before the device goes into Idle Mode. In the Idle
mode, the clock to the CPU is halted, but not to the Interrupt, Timer, Watchdog timer and Serial port
blocks. This forces the CPU state to be frozen; the Program counter, the Stack Pointer, the Program
Status Word, the Accumulator and the other registers hold their contents. The port pins hold the logi-
cal states they had at the time Idle was activated. The Idle mode can be terminated in two ways. Since
the interrupt controller is still active, the activation of any enabled interrupt can wake up the processor.
This will automatically clear the Idle bit, terminate the Idle mode, and the Interrupt Service Routine
(ISR) will be executed. After the ISR, execution of the program will continue from the instruction which
put the device into Idle mode.
The Idle mode can also be exited by activating the reset. The device can put into reset either by apply-
ing a high on the external RST pin, a Power on reset condition or a Watchdog timer reset. The exter-
nal reset pin has to be held high for at least two machine cycles i.e. 24 clock periods to be recognized
as a valid reset. In the reset condition the program counter is reset to 0000h and all the SFRs are set
to the reset condition. Since the clock is already running there is no delay and execution starts imme-
diately.
11.2 Power Down Mode
The device can be put into Power Down mode by writing 1 to bit PCON.1. The instruction that does
this will be the last instruction to be executed before the device goes into Power Down mode. In the
Power Down mode, all the clocks are stopped and the device comes to a halt. All activity is completely
stopped and the power consumption is reduced to the lowest possible value. The port pins output the
values held by their respective SFRs.
The W78E054D/W78E052D will exit the Power Down mode with a reset or by an external interrupt pin
enabled as level detects. An external reset can be used to exit the Power down state. The high on
RST pin terminates the Power Down mode, and restarts the clock. The program execution will restart
from 0000h. In the Power down mode, the clock is stopped, so the Watchdog timer cannot be used to
provide the reset to exit Power down mode.
The W78E054D/W78E052D can be woken from the Power Down mode by forcing an external inter-
rupt pin activated, provided the corresponding interrupt is enabled, while the global enable(EA) bit is
set and the external input has been set to a level detect mode. If these conditions are met, then the
high level on the external pin re-starts the oscillator. Then device executes the interrupt service routine
for the corresponding external interrupt. After the interrupt service routine is completed, the program
execution returns to the instruction after one which put the device into Power Down mode and contin-
ues from there.
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Publication Release Date: Jun 9, 2015
Revision A13