W78E054D Datasheet, PDF (21/89 Pages) List of Unclassifed Manufacturers – 8-bit microcontroller

W78E054D/W78E052D Data Sheet
1: Port 0 pins are internally pulled-up. Port 0 is structurally the same as Port 2.
Power Control
Bit: 7
6
5
4
3
2
1
0
SMOD
SMOD0 -
POR
GF1
GF0
PD
IDL
Mnemonic: PCON
Address: 87h
BIT NAME
7 SMOD
6 SMOD
0
5-
4 POR
3 GF1
2 GF0
1 PD
0 IDL
FUNCTION
1: This bit doubles the serial port baud rate in mode 1, 2, and 3 when set to 1.
0: Framing Error Detection Disable. SCON.7 (SM0/FE) bit is used as SM0 (stand-
ard 8052 function).
1: Framing Error Detection Enable. SCON.7 (SM0/FE) bit is used to reflect as
Frame Error (FE) status flag.
Reserved
0: Cleared by software.
1: Set automatically when a power-on reset has occurred.
General purpose user flags.
General purpose user flags.
1: The CPU goes into the POWER DOWN mode. In this mode, all the clocks are
stopped and program execution is frozen.
1: The CPU goes into the IDLE mode. In this mode, the clocks CPU clock stopped,
so program execution is frozen. But the clock to the serial, timer and interrupt
blocks is not stopped, and these blocks continue operating.
Timer Control
Bit: 7
6
5
4
3
2
1
0
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Mnemonic: TCON
Address: 88h
BIT NAME FUNCTION
7 TF1
Timer 1 Overflow Flag. This bit is set when Timer 1 overflows. It is cleared auto-
matically when the program does a timer 1 interrupt service routine. Software can
also set or clear this bit.
6 TR1
Timer 1 Run Control. This bit is set or cleared by software to turn timer/counter on
or off.
5 TF0
Timer 0 Overflow Flag. This bit is set when Timer 0 overflows. It is cleared auto-
matically when the program does a timer 0 interrupt service routine. Software can
also set or clear this bit.
4 TR0
Timer 0 Run Control. This bit is set or cleared by software to turn timer/counter on
or off.
3 IE1
Interrupt 1 Edge Detect Flag: Set by hardware when an edge/level is detected on
INT1. This bit is cleared by hardware when the service routine is vectored to only if
the interrupt was edge triggered. Otherwise it follows the inverse of the pin.
2 IT1
Interrupt 1 Type Control. Set/cleared by software to specify falling edge/ low level
triggered external inputs.
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Publication Release Date: Jun 9, 2015
Revision A13