W78E054D Datasheet, PDF (25/89 Pages) List of Unclassifed Manufacturers – 8-bit microcontroller

W78E054D/W78E052D Data Sheet
4 REN
3 TB8
2 RB8
1 TI
0 RI
tor clock. This results in faster synchronous serial communication.
Receive enable:
0: Disable serial reception.
1: Enable serial reception.
This is the 9th bit to be transmitted in modes 2 and 3. This bit is set and cleared
by software as desired.
In modes 2 and 3 this is the received 9th data bit. In mode 1, if SM2 = 0, RB8 is
the stop bit that was received. In mode 0 it has no function.
Transmit interrupt flag: This flag is set by hardware at the end of the 8th bit time
in mode 0, or at the beginning of the stop bit in all other modes during serial
transmission. This bit must be cleared by software.
Receive interrupt flag: This flag is set by hardware at the end of the 8th bit time
in mode 0, or halfway through the stop bits time in the other modes during serial
reception. However the restrictions of SM2 apply to this bit. This bit can be
cleared only by software.
Mode
0
1
2
3
SM0
0
0
1
1
SM1
0
1
0
1
SM1, SM0: Mode Select bits:
Description
Length Baud Rate
Synchronous
8
Tclk divided by 4 or 12
Asynchronous
10
Variable
Asynchronous
11
Tclk divided by 32 or 64
Asynchronous
11
Variable
Serial Data Buffer
Bit: 7
6
5
4
3
2
1
0
SBUF.7 SBUF.6 SBUF.5 SBUF.4 SBUF.3 SBUF.2 SBUF.1 SBUF.0
Mnemonic: SBUF
Address: 99h
BIT NAME
FUNCTION
7~0 SBUF
Serial data on the serial port is read from or written to this location. It actually
consists of two separate internal 8-bit registers. One is the receive resister, and
the other is the transmit buffer. Any read access gets data from the receive data
buffer, while write access is to the transmit data buffer.
Port 2
Bit: 7
P2.7
Mnemonic: P2
BIT NAME
7-0 P2.[7:0]
6
5
4
3
2
1
0
P2.6
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0
Address: A0h
FUNCTION
Port 2 is a bi-directional I/O port with internal pull-ups. This port also provides the
upper address bits for accesses to external memory.
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Publication Release Date: Jun 9, 2015
Revision A13