LM3S316 Datasheet, PDF (385/421 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S316 Data Sheet
Register 30: PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068
Register 31: PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8
The PWM0DBCTL register controls the dead-band generator, which produces the PWM0 and PWM1
signals based on the PWM0A and PWM0B signals. When disabled, the PWM0A signal passes through
to the PWM0 signal and the PWM0B signal passes through to the PWM1 signal. When enabled, the
PWM0B signal is ignored; the PWM0 signal is generated by delaying the rising edge(s) of the PWM0A
signal by the value in the PWM0DBRISE register (see page 386), and the PWM1 signal is
generated by delaying the falling edge(s) of the PWM0A signal by the value in the PWM0DBFALL
register (see page 387). In a similar manner, PWM2 and PWM3 are produced from the PWM1A and
PWM1B signals.
PWMn Dead-Band Control (PWMnDBCTL)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
Enable
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:1
0
Name
reserved
Enable
Type
RO
R/W
Reset
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
When set, the dead-band generator inserts dead bands into
the output signals; when clear, it simply passes the PWM
signals through.
April 27, 2007
385
Preliminary