LM3S808 Datasheet, PDF (376/416 Pages) List of Unclassifed Manufacturers – Microcontroller

Signal Tables
17
Signal Tables
The following tables list the signals available for each pin. Functionality is enabled by software with
the GPIOAFSEL register.
Important: All multiplexed pins are GPIOs by default, with the exception of the five JTAG pins (PB7
and PC[3:0]) which default to the JTAG functionality.
Table 17-1 on page 376 shows the pin-to-signal-name mapping, including functional characteristics
of the signals. Table 17-2 on page 378 lists the signals in alphabetical order by signal name.
Table 17-3 on page 380 groups the signals by functionality, except for GPIOs. Table 17-4 on page
381 lists the GPIO pins and their alternate functionality.
Table 17-1. Signals by Pin Number
Pin Number
1
2
3
4
5
6
Pin Name
ADC0
ADC1
ADC2
ADC3
RST
LDO
Pin Type
I
I
I
I
I
-
7
VDD
-
8
GND
-
9
OSC0
I
10
OSC1
O
11
PC7
I/O
CCP4
I/O
12
PC6
I/O
CCP3
I/O
13
PC5
I/O
CCP1
I/O
14
PC4
I/O
15
VDD
-
16
GND
-
17
PA0
I/O
U0Rx
I
18
PA1
I/O
U0Tx
O
19
PA2
I/O
SSIClk
I/O
20
PA3
I/O
SSIFss
I/O
Buffer Type Description
Analog Analog-to-digital converter input 0.
Analog Analog-to-digital converter input 1.
Analog Analog-to-digital converter input 2.
Analog Analog-to-digital converter input 3.
TTL
System reset input.
Power
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater.
Power Positive supply for I/O and some logic.
Power Ground reference for logic and I/O pins.
Analog
Main oscillator crystal input or an external
clock reference input.
Analog Main oscillator crystal output.
TTL
GPIO port C bit 7
TTL
Capture/Compare/PWM 4
TTL
GPIO port C bit 6
TTL
Capture/Compare/PWM 3
TTL
GPIO port C bit 5
TTL
Capture/Compare/PWM 1
TTL
GPIO port C bit 4
Power Positive supply for I/O and some logic.
Power Ground reference for logic and I/O pins.
TTL
GPIO port A bit 0
TTL
UART module 0 receive
TTL
GPIO port A bit 1
TTL
UART module 0 transmit
TTL
GPIO port A bit 2
TTL
SSI clock
TTL
GPIO port A bit 3
TTL
SSI frame
376
October 01, 2007
Preliminary