LM3S808 Datasheet, PDF (13/416 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S808 Microcontroller
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GPIO Interrupt Both Edges (GPIOIBE), offset 0x408 ........................................................ 134
GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 135
GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 136
GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 137
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 138
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 139
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 140
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 142
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 143
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 144
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 145
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 146
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 147
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 148
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 149
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 150
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 151
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 152
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 153
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 154
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 155
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 156
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 157
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 158
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 159
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 160
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 161
General-Purpose Timers ............................................................................................................. 162
Register 1: GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 174
Register 2: GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 175
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 177
Register 4: GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 179
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 182
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 184
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 185
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 186
Register 9: GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 188
Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 189
Register 11: GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 190
Register 12: GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 191
Register 13: GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 192
Register 14: GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 193
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 194
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 195
Register 17: GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 196
Register 18: GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 197
Watchdog Timer ........................................................................................................................... 198
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 201
October 01, 2007
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Preliminary