LM3S617 Datasheet, PDF (175/379 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S617 Data Sheet
Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C
This register is used to load the starting count value into TimerB. When the GPTM is configured to
a 32-bit mode, GPTMTBILR returns the current value of TimerB and ignores writes.
GPTM TimerB Interval Load (GPTMTBILR)
Offset 0x02C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TBILRL
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Bit/Field
31:16
15:0
Name
reserved
TBILRL
Type
RO
R/W
Reset
0
0xFFFF
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPTM TimerB Interval Load Register
When the GPTM is not configured as a 32-bit timer, a write to
this field updates GPTMTBILR. In 32-bit mode, writes are
ignored, and reads return the current value of GPTMTBILR.
May 4, 2007
175
Preliminary